wil6210: fix RGF_CAF_ICR address for Talyn-MB
authorMaya Erez <merez@codeaurora.org>
Wed, 31 Oct 2018 08:52:20 +0000 (10:52 +0200)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 6 Nov 2018 16:03:55 +0000 (18:03 +0200)
RGF_CAF_ICR register location has changed in Talyn-MB.
Add RGF_CAF_ICR_TALYN_MB to support the new address.

Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/wil6210/main.c
drivers/net/wireless/ath/wil6210/wil6210.h

index 68aca52a68e4f867e73e25923cb04f07ae1ce190..ba6a2eeedb6502a342e5c4f444db84ed697fc7ad 100644 (file)
@@ -1499,8 +1499,15 @@ static void wil_pre_fw_config(struct wil6210_priv *wil)
        wil6210_clear_irq(wil);
        /* CAF_ICR - clear and mask */
        /* it is W1C, clear by writing back same value */
-       wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
-       wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
+       if (wil->hw_version < HW_VER_TALYN_MB) {
+               wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
+               wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
+       } else {
+               wil_s(wil,
+                     RGF_CAF_ICR_TALYN_MB + offsetof(struct RGF_ICR, ICR), 0);
+               wil_w(wil, RGF_CAF_ICR_TALYN_MB +
+                     offsetof(struct RGF_ICR, IMV), ~0);
+       }
        /* clear PAL_UNIT_ICR (potential D0->D3 leftover)
         * In Talyn-MB host cannot access this register due to
         * access control, hence PAL_UNIT_ICR is cleared by the FW
index ad7003f350a26f956ef53aacd7547e19b5217a48..0f3be3ffc6a28551e9ca8b49ed3a6f02b5673a2f 100644 (file)
@@ -320,6 +320,7 @@ struct RGF_ICR {
 /* MAC timer, usec, for packet lifetime */
 #define RGF_MAC_MTRL_COUNTER_0         (0x886aa8)
 
+#define RGF_CAF_ICR_TALYN_MB           (0x8893d4) /* struct RGF_ICR */
 #define RGF_CAF_ICR                    (0x88946c) /* struct RGF_ICR */
 #define RGF_CAF_OSC_CONTROL            (0x88afa4)
        #define BIT_CAF_OSC_XTAL_EN             BIT(0)