drm/amd/display: update dig enable sequence

[why]
HW delta follow up

Reviewed-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c
index d05e7655f603e3356c4830ffb152479d534dc59f..2fef1419ae91743cbfd2903df5f64d85751758fb 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c
@@ -274,10 +274,10 @@ static bool is_dp_dig_pixel_rate_div_policy(struct dc *dc, const struct dc_crtc_
                dc->debug.enable_dp_dig_pixel_rate_div_policy;
 }
 
-static void enc32_stream_encoder_dp_unblank(
-        struct dc_link *link,
-               struct stream_encoder *enc,
-               const struct encoder_unblank_param *param)
+void enc32_stream_encoder_dp_unblank(
+       struct dc_link *link,
+       struct stream_encoder *enc,
+       const struct encoder_unblank_param *param)
 {
        struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
        struct dc *dc = enc->ctx->dc;
@@ -440,7 +440,7 @@ static void enc32_reset_fifo(struct stream_encoder *enc, bool reset)
                udelay(10);
 }
 
-static void enc32_enable_fifo(struct stream_encoder *enc)
+void enc32_enable_fifo(struct stream_encoder *enc)
 {
        struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
 

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h
index 875b1cd46056ba4249d15d5fac1a34b4bbb9df4f..1be5410cce97442f022870328c3eb9a0a6697e9d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.h
@@ -194,4 +194,12 @@ void dcn32_dio_stream_encoder_construct(
        const struct dcn10_stream_encoder_shift *se_shift,
        const struct dcn10_stream_encoder_mask *se_mask);
 
+
+void enc32_enable_fifo(struct stream_encoder *enc);
+
+void enc32_stream_encoder_dp_unblank(
+               struct dc_link *link,
+               struct stream_encoder *enc,
+               const struct encoder_unblank_param *param);
+
 #endif /* __DC_DIO_STREAM_ENCODER_DCN32_H__ */

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index 020d668ce09ecbf614f33b8677dd5685be8a10ae..aa08925d54c98d19ebd3bed018fe1fb147cbec30 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2477,11 +2477,12 @@ void link_set_dpms_on(
                 * from transmitter control.
                 */
                if (!(dc_is_virtual_signal(pipe_ctx->stream->signal) ||
-                               dp_is_128b_132b_signal(pipe_ctx)))
-                       if (link_enc)
-                               link_enc->funcs->setup(
-                                       link_enc,
-                                       pipe_ctx->stream->signal);
+                               dp_is_128b_132b_signal(pipe_ctx))) {
+                               if (link_enc)
+                                       link_enc->funcs->setup(
+                                               link_enc,
+                                               pipe_ctx->stream->signal);
+                       }
 
                dc->hwss.enable_stream(pipe_ctx);