iio: accel: mma8452: claim direct mode during write raw
authorJonathan Cameron <jic23@kernel.org>
Sat, 15 Oct 2016 14:55:06 +0000 (15:55 +0100)
committerJonathan Cameron <jic23@kernel.org>
Sun, 23 Oct 2016 18:33:54 +0000 (19:33 +0100)
Driver was checking for direct mode but not locking it.  Use
claim/release helper functions to guarantee the device stays
in direct mode during all write raw operations.

Signed-off-by: Alison Schofield <amsfield22@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
drivers/iio/accel/mma8452.c

index 7951def89d63856d1aaccc5d35d668f0e5175eca..f418c588af6ad6cd14ea5ff6ff3b9290498b8bf3 100644 (file)
@@ -666,37 +666,46 @@ static int mma8452_write_raw(struct iio_dev *indio_dev,
        struct mma8452_data *data = iio_priv(indio_dev);
        int i, ret;
 
-       if (iio_buffer_enabled(indio_dev))
-               return -EBUSY;
+       ret = iio_device_claim_direct_mode(indio_dev);
+       if (ret)
+               return ret;
 
        switch (mask) {
        case IIO_CHAN_INFO_SAMP_FREQ:
                i = mma8452_get_samp_freq_index(data, val, val2);
-               if (i < 0)
-                       return i;
-
+               if (i < 0) {
+                       ret = i;
+                       break;
+               }
                data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
                data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
 
-               return mma8452_change_config(data, MMA8452_CTRL_REG1,
-                                            data->ctrl_reg1);
+               ret = mma8452_change_config(data, MMA8452_CTRL_REG1,
+                                           data->ctrl_reg1);
+               break;
        case IIO_CHAN_INFO_SCALE:
                i = mma8452_get_scale_index(data, val, val2);
-               if (i < 0)
-                       return i;
+               if (i < 0) {
+                       ret = i;
+                       break;
+               }
 
                data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
                data->data_cfg |= i;
 
-               return mma8452_change_config(data, MMA8452_DATA_CFG,
-                                            data->data_cfg);
+               ret = mma8452_change_config(data, MMA8452_DATA_CFG,
+                                           data->data_cfg);
+               break;
        case IIO_CHAN_INFO_CALIBBIAS:
-               if (val < -128 || val > 127)
-                       return -EINVAL;
+               if (val < -128 || val > 127) {
+                       ret = -EINVAL;
+                       break;
+               }
 
-               return mma8452_change_config(data,
-                                            MMA8452_OFF_X + chan->scan_index,
-                                            val);
+               ret = mma8452_change_config(data,
+                                           MMA8452_OFF_X + chan->scan_index,
+                                           val);
+               break;
 
        case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
                if (val == 0 && val2 == 0) {
@@ -705,23 +714,30 @@ static int mma8452_write_raw(struct iio_dev *indio_dev,
                        data->data_cfg |= MMA8452_DATA_CFG_HPF_MASK;
                        ret = mma8452_set_hp_filter_frequency(data, val, val2);
                        if (ret < 0)
-                               return ret;
+                               break;
                }
 
-               return mma8452_change_config(data, MMA8452_DATA_CFG,
+               ret = mma8452_change_config(data, MMA8452_DATA_CFG,
                                             data->data_cfg);
+               break;
 
        case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
                ret = mma8452_get_odr_index(data);
 
                for (i = 0; i < ARRAY_SIZE(mma8452_os_ratio); i++) {
-                       if (mma8452_os_ratio[i][ret] == val)
-                               return mma8452_set_power_mode(data, i);
+                       if (mma8452_os_ratio[i][ret] == val) {
+                               ret = mma8452_set_power_mode(data, i);
+                               break;
+                       }
                }
-
+               break;
        default:
-               return -EINVAL;
+               ret = -EINVAL;
+               break;
        }
+
+       iio_device_release_direct_mode(indio_dev);
+       return ret;
 }
 
 static int mma8452_read_thresh(struct iio_dev *indio_dev,