drm/amdgpu: Add support to load P2S tables

Add support to load P2S tables through PSP.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a82913320c56b9c468dffd288b2e0a206830364c..c24310ff6fa12dc54db20e0d75f615bbd96fa33a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2412,6 +2412,9 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode,
        case AMDGPU_UCODE_ID_UMSCH_MM_CMD_BUFFER:
                *type = GFX_FW_TYPE_UMSCH_CMD_BUFFER;
                break;
+       case AMDGPU_UCODE_ID_P2S_TABLE:
+               *type = GFX_FW_TYPE_P2S_TABLE;
+               break;
        case AMDGPU_UCODE_ID_MAXIMUM:
        default:
                return -EINVAL;
@@ -2503,6 +2506,24 @@ int psp_execute_ip_fw_load(struct psp_context *psp,
        return ret;
 }
 
+static int psp_load_p2s_table(struct psp_context *psp)
+{
+       int ret;
+       struct amdgpu_device *adev = psp->adev;
+       struct amdgpu_firmware_info *ucode =
+               &adev->firmware.ucode[AMDGPU_UCODE_ID_P2S_TABLE];
+
+       if (adev->in_runpm && (adev->pm.rpm_mode == AMDGPU_RUNPM_BACO))
+               return 0;
+
+       if (!ucode->fw || amdgpu_sriov_vf(psp->adev))
+               return 0;
+
+       ret = psp_execute_ip_fw_load(psp, ucode);
+
+       return ret;
+}
+
 static int psp_load_smu_fw(struct psp_context *psp)
 {
        int ret;
@@ -2543,6 +2564,9 @@ static bool fw_load_skip_check(struct psp_context *psp,
        if (!ucode->fw || !ucode->ucode_size)
                return true;
 
+       if (ucode->ucode_id == AMDGPU_UCODE_ID_P2S_TABLE)
+               return true;
+
        if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
            (psp_smu_reload_quirk(psp) ||
             psp->autoload_supported ||
@@ -2591,6 +2615,9 @@ static int psp_load_non_psp_fw(struct psp_context *psp)
                        return ret;
        }
 
+       /* Load P2S table first if it's available */
+       psp_load_p2s_table(psp);
+
        for (i = 0; i < adev->firmware.max_ucodes; i++) {
                ucode = &adev->firmware.ucode[i];
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 771ef8017a980c5b4bccf1479fa0e8ca3a9612d5..606406c8867703a88666ba59864e2d6bb7593919 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -642,6 +642,8 @@ const char *amdgpu_ucode_name(enum AMDGPU_UCODE_ID ucode_id)
                return "SMC";
        case AMDGPU_UCODE_ID_PPTABLE:
                return "PPTABLE";
+       case AMDGPU_UCODE_ID_P2S_TABLE:
+               return "P2STABLE";
        case AMDGPU_UCODE_ID_UVD:
                return "UVD";
        case AMDGPU_UCODE_ID_UVD1:
@@ -922,6 +924,10 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
                        ucode->ucode_size = ucode->fw->size;
                        ucode_addr = (u8 *)ucode->fw->data;
                        break;
+               case AMDGPU_UCODE_ID_P2S_TABLE:
+                       ucode->ucode_size = ucode->fw->size;
+                       ucode_addr = (u8 *)ucode->fw->data;
+                       break;
                case AMDGPU_UCODE_ID_IMU_I:
                        ucode->ucode_size = le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes);
                        ucode_addr = (u8 *)ucode->fw->data +

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index ae5fa61d289098026877b0b30553858e68f650fc..4244a13f9f22bb58171fcfab41400862573c2406 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -510,6 +510,7 @@ enum AMDGPU_UCODE_ID {
        AMDGPU_UCODE_ID_UMSCH_MM_UCODE,
        AMDGPU_UCODE_ID_UMSCH_MM_DATA,
        AMDGPU_UCODE_ID_UMSCH_MM_CMD_BUFFER,
+       AMDGPU_UCODE_ID_P2S_TABLE,
        AMDGPU_UCODE_ID_MAXIMUM,
 };