x86, mce: enable MCE_INTEL for 32bit new MCE
authorAndi Kleen <ak@linux.intel.com>
Tue, 28 Apr 2009 21:32:56 +0000 (23:32 +0200)
committerH. Peter Anvin <hpa@zytor.com>
Thu, 28 May 2009 16:24:13 +0000 (09:24 -0700)
Enable the 64bit MCE_INTEL code (CMCI, thermal interrupts) for 32bit NEW_MCE.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/Kconfig
arch/x86/include/asm/entry_arch.h
arch/x86/include/asm/hardirq.h
arch/x86/include/asm/irq_vectors.h
arch/x86/kernel/cpu/mcheck/threshold.c
arch/x86/kernel/entry_64.S
arch/x86/kernel/irqinit_32.c
arch/x86/kernel/traps.c

index c1c5ccd1937f56b7be18c604fe3718e622241b66..e1c9f77f69ecf0c6d00958dec6c1670bc4ee3e99 100644 (file)
@@ -808,7 +808,7 @@ config X86_NEW_MCE
 config X86_MCE_INTEL
        def_bool y
        prompt "Intel MCE features"
-       depends on X86_64 && X86_MCE && X86_LOCAL_APIC
+       depends on X86_NEW_MCE && X86_LOCAL_APIC
        ---help---
           Additional support for intel specific MCE features such as
           the thermal monitor.
index 486c9e946f5c551aeb1e46796eeb7e5f7a5bb772..b2eb9c066843f62eaab85f1caf9997b7d27a8f31 100644 (file)
@@ -56,4 +56,8 @@ BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
 BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
 #endif
 
+#ifdef CONFIG_X86_MCE_THRESHOLD
+BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
+#endif
+
 #endif
index 37555e52f980ac170e779dbe2aaa1e5e0c8ca07a..922ee7c296938b3b6c3807505b386fa6ee7bda1f 100644 (file)
@@ -20,7 +20,7 @@ typedef struct {
 #endif
 #ifdef CONFIG_X86_MCE
        unsigned int irq_thermal_count;
-# ifdef CONFIG_X86_64
+# ifdef CONFIG_X86_MCE_THRESHOLD
        unsigned int irq_threshold_count;
 # endif
 #endif
index 3cbd79bbb47c82613341fca01ee6e174319342fe..451e24d18050b579627e1dd07f651972141353a1 100644 (file)
 #define CALL_FUNCTION_SINGLE_VECTOR    0xfb
 #define THERMAL_APIC_VECTOR            0xfa
 
+#define THRESHOLD_APIC_VECTOR          0xf9
+
 #ifdef CONFIG_X86_32
-/* 0xf8 - 0xf9 : free */
+/* 0xf9 : free */
 #else
-# define THRESHOLD_APIC_VECTOR         0xf9
 # define UV_BAU_MESSAGE                        0xf8
 #endif
 
index 23ee9e730f78856c2f9e72687ac82316c463f26c..d746df2909c9fe306d20f1e5288cc476c5777209 100644 (file)
@@ -17,7 +17,7 @@ static void default_threshold_interrupt(void)
 
 void (*mce_threshold_vector)(void) = default_threshold_interrupt;
 
-asmlinkage void mce_threshold_interrupt(void)
+asmlinkage void smp_threshold_interrupt(void)
 {
        exit_idle();
        irq_enter();
index 63276c45bffa13c2835256b8d68b92c6ac58d32f..a31a7f29cffe0ba1ff57cadc856cdb7557fbb0ba 100644 (file)
@@ -1007,7 +1007,7 @@ apicinterrupt INVALIDATE_TLB_VECTOR_START+7 \
 #endif
 
 apicinterrupt THRESHOLD_APIC_VECTOR \
-       threshold_interrupt mce_threshold_interrupt
+       threshold_interrupt smp_threshold_interrupt
 apicinterrupt THERMAL_APIC_VECTOR \
        thermal_interrupt smp_thermal_interrupt
 
index 98846e03211e224ddfef03c4d2be36d84672794a..2512ad93dabf227187e68601cbad48161b32f298 100644 (file)
@@ -186,6 +186,10 @@ void __init native_init_IRQ(void)
        alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
 #endif
 
+#ifdef CONFIG_X86_MCE_THRESHOLD
+       alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
+#endif
+
        if (!acpi_ioapic)
                setup_irq(2, &irq2);
 
index ad771f15bddd0d1859fc44fe22f6ca7fcf4dd8a6..0d358c884b354b47d2f78145e8196013e3329024 100644 (file)
@@ -804,7 +804,7 @@ asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
 {
 }
 
-asmlinkage void __attribute__((weak)) mce_threshold_interrupt(void)
+asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
 {
 }