spi: microchip-core-qspi: set min_speed_hz during probe
authorConor Dooley <conor.dooley@microchip.com>
Fri, 20 Jun 2025 13:28:24 +0000 (14:28 +0100)
committerMark Brown <broonie@kernel.org>
Mon, 23 Jun 2025 20:33:53 +0000 (21:33 +0100)
The controller's minimum possible bus clock is 1/30 the rate of the
input clock. Naively set the minimum bus clock speed the controller
is capable of during probe, assuming that the rate will never reduce
further.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20250620-drained-widen-ac311bd5f172@spud
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-microchip-core-qspi.c

index fa828fcaaef2d4b44c21e08c09e6afbb7ba3de3d..111ae6519ff414aa12b34df8c048c9c83f76a52b 100644 (file)
@@ -562,6 +562,7 @@ static int mchp_coreqspi_probe(struct platform_device *pdev)
        ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
                          SPI_TX_DUAL | SPI_TX_QUAD;
        ctlr->dev.of_node = np;
+       ctlr->min_speed_hz = clk_get_rate(qspi->clk) / 30;
 
        ret = devm_spi_register_controller(&pdev->dev, ctlr);
        if (ret)