drm/amd/display: Fix DP Compliance tests 4.3.2.1 and 4.3.2.2
authorAric Cyr <aric.cyr@amd.com>
Wed, 22 Jul 2020 19:40:06 +0000 (15:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 6 Aug 2020 20:42:52 +0000 (16:42 -0400)
[Why]
Test expects that we also read HPD_IRQ_VECTOR when checking for
symbol loss as well lane status.

[How]
Read bytes 0x200-0x205 instead of just 0x202-0x205

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

index 1a3dbed3becbdca1577bd0d5fe6595859545d220..d7d2dcd49c06262bc9c6c27daf76175af8e4d837 100644 (file)
@@ -1138,23 +1138,22 @@ static enum link_training_result check_link_loss_status(
        const struct link_training_settings *link_training_setting)
 {
        enum link_training_result status = LINK_TRAINING_SUCCESS;
-       unsigned int lane01_status_address = DP_LANE0_1_STATUS;
        union lane_status lane_status;
-       uint8_t dpcd_buf[4] = {0};
+       uint8_t dpcd_buf[6] = {0};
        uint32_t lane;
 
        core_link_read_dpcd(
-               link,
-               lane01_status_address,
-               (uint8_t *)(dpcd_buf),
-               sizeof(dpcd_buf));
+                       link,
+                       DP_SINK_COUNT,
+                       (uint8_t *)(dpcd_buf),
+                       sizeof(dpcd_buf));
 
        /*parse lane status*/
        for (lane = 0; lane < link->cur_link_settings.lane_count; lane++) {
                /*
                 * check lanes status
                 */
-               lane_status.raw = get_nibble_at_index(&dpcd_buf[0], lane);
+               lane_status.raw = get_nibble_at_index(&dpcd_buf[2], lane);
 
                if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
                        !lane_status.bits.CR_DONE_0 ||