drm/amd/display: run subvp validation with supported vlevel

[WHY]
Subvp portion validation currently assumes that if vlevel provided does not
support pstate, then none will, and so subvp is not used.

[HOW]
After get vlevel, use lowest vlevel that supports pstate if it
exists, and use that for subvp validation.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index efffe92eb7711ec678a2e14a60f3fa07fab1600a..2278e617164bc63b283fd9037bc5ae99dcb23fda 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -1169,6 +1169,16 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,
                        pipes[0].clks_cfg.dppclk_mhz = get_dppclk_calculated(&context->bw_ctx.dml, pipes, *pipe_cnt, 0);
                        *vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, *pipe_cnt);
 
+                       /* Check that vlevel requested supports pstate or not
+                        * if not, select the lowest vlevel that supports it
+                        */
+                       for (i = *vlevel; i < context->bw_ctx.dml.soc.num_states; i++) {
+                               if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) {
+                                       *vlevel = i;
+                                       break;
+                               }
+                       }
+
                        if (*vlevel < context->bw_ctx.dml.soc.num_states &&
                            vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported
                            && subvp_validate_static_schedulability(dc, context, *vlevel)) {