drm/amdgpu: rename the ip_dump to ip_dump_core
authorSunil Khatri <sunil.khatri@amd.com>
Tue, 7 May 2024 05:38:34 +0000 (11:08 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 23 May 2024 19:12:58 +0000 (15:12 -0400)
Rename the memory pointer from ip_dump to ip_dump_core
to make it specific to core registers and rest other
registers to be dumped in their respective memories.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

index 109f471ff3153e6e14d68fe33674095b475107eb..a28462643b00fcfdf71e7cd40cb7db557f6e693e 100644 (file)
@@ -435,7 +435,7 @@ struct amdgpu_gfx {
        bool                            mcbp; /* mid command buffer preemption */
 
        /* IP reg dump */
-       uint32_t                        *ip_dump;
+       uint32_t                        *ip_dump_core;
 };
 
 struct amdgpu_gfx_ras_reg_entry {
index 1f516466ac13760c7590eba136cf425574b04f39..73149150fe2e17555698eaf53f95f838f5cc16bd 100644 (file)
@@ -4603,9 +4603,9 @@ static void gfx_v10_0_alloc_dump_mem(struct amdgpu_device *adev)
        ptr = kcalloc(reg_count, sizeof(uint32_t), GFP_KERNEL);
        if (ptr == NULL) {
                DRM_ERROR("Failed to allocate memory for IP Dump\n");
-               adev->gfx.ip_dump = NULL;
+               adev->gfx.ip_dump_core = NULL;
        } else {
-               adev->gfx.ip_dump = ptr;
+               adev->gfx.ip_dump_core = ptr;
        }
 }
 
@@ -4815,7 +4815,7 @@ static int gfx_v10_0_sw_fini(void *handle)
 
        gfx_v10_0_free_microcode(adev);
 
-       kfree(adev->gfx.ip_dump);
+       kfree(adev->gfx.ip_dump_core);
 
        return 0;
 }
@@ -9292,13 +9292,13 @@ static void gfx_v10_ip_print(void *handle, struct drm_printer *p)
        uint32_t i;
        uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);
 
-       if (!adev->gfx.ip_dump)
+       if (!adev->gfx.ip_dump_core)
                return;
 
        for (i = 0; i < reg_count; i++)
                drm_printf(p, "%-50s \t 0x%08x\n",
                           gc_reg_list_10_1[i].reg_name,
-                          adev->gfx.ip_dump[i]);
+                          adev->gfx.ip_dump_core[i]);
 }
 
 static void gfx_v10_ip_dump(void *handle)
@@ -9307,12 +9307,12 @@ static void gfx_v10_ip_dump(void *handle)
        uint32_t i;
        uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);
 
-       if (!adev->gfx.ip_dump)
+       if (!adev->gfx.ip_dump_core)
                return;
 
        amdgpu_gfx_off_ctrl(adev, false);
        for (i = 0; i < reg_count; i++)
-               adev->gfx.ip_dump[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));
+               adev->gfx.ip_dump_core[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));
        amdgpu_gfx_off_ctrl(adev, true);
 }