KVM: x86: Make use of kvm_read_cr*_bits() when testing bits
authorMathias Krause <minipli@grsecurity.net>
Wed, 22 Mar 2023 01:37:29 +0000 (02:37 +0100)
committerSean Christopherson <seanjc@google.com>
Wed, 22 Mar 2023 14:47:25 +0000 (07:47 -0700)
Make use of the kvm_read_cr{0,4}_bits() helper functions when we only
want to know the state of certain bits instead of the whole register.

This not only makes the intent cleaner, it also avoids a potential
VMREAD in case the tested bits aren't guest owned.

Signed-off-by: Mathias Krause <minipli@grsecurity.net>
Link: https://lore.kernel.org/r/20230322013731.102955-5-minipli@grsecurity.net
Signed-off-by: Sean Christopherson <seanjc@google.com>
arch/x86/kvm/pmu.c
arch/x86/kvm/vmx/vmx.c

index 612e6c70ce2e7212e327589b8e76913114377af7..f4aa170b5b9729662a4c7257eb00c032306b1200 100644 (file)
@@ -540,9 +540,9 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data)
        if (!pmc)
                return 1;
 
-       if (!(kvm_read_cr4(vcpu) & X86_CR4_PCE) &&
+       if (!(kvm_read_cr4_bits(vcpu, X86_CR4_PCE)) &&
            (static_call(kvm_x86_get_cpl)(vcpu) != 0) &&
-           (kvm_read_cr0(vcpu) & X86_CR0_PE))
+           (kvm_read_cr0_bits(vcpu, X86_CR0_PE)))
                return 1;
 
        *data = pmc_read_counter(pmc) & mask;
index d7bf14abdba1df6e91df8e96e23b935fe788b896..8fc1a0c7856ff8bba0d7688f8f10baa226974396 100644 (file)
@@ -5517,7 +5517,7 @@ static int handle_cr(struct kvm_vcpu *vcpu)
                break;
        case 3: /* lmsw */
                val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f;
-               trace_kvm_cr_write(0, (kvm_read_cr0(vcpu) & ~0xful) | val);
+               trace_kvm_cr_write(0, (kvm_read_cr0_bits(vcpu, ~0xful) | val));
                kvm_lmsw(vcpu, val);
 
                return kvm_skip_emulated_instruction(vcpu);
@@ -7575,7 +7575,7 @@ static u8 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
        if (!kvm_arch_has_noncoherent_dma(vcpu->kvm))
                return (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT) | VMX_EPT_IPAT_BIT;
 
-       if (kvm_read_cr0(vcpu) & X86_CR0_CD) {
+       if (kvm_read_cr0_bits(vcpu, X86_CR0_CD)) {
                if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
                        cache = MTRR_TYPE_WRBACK;
                else