Merge tag 'v3.15-rc1' into perf/urgent

Pick up the latest fixes.

Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --combined arch/x86/kernel/cpu/perf_event_intel_rapl.c
index 3cec947e3b98cc9bcf0c5489dba14dd4f515e279,059218ed5208e83ab40d44374064a53fdeab5568..4b9a9e9466bd1bf8adc2e6660a1edaa61e4f8819
--- 1/arch/x86/kernel/cpu/perf_event_intel_rapl.c
--- 2/arch/x86/kernel/cpu/perf_event_intel_rapl.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
@@@ -59,7 -59,7 +59,7 @@@
  #define INTEL_RAPL_PKG                0x2     /* pseudo-encoding */
  #define RAPL_IDX_RAM_NRG_STAT 2       /* DRAM */
  #define INTEL_RAPL_RAM                0x3     /* pseudo-encoding */
 -#define RAPL_IDX_PP1_NRG_STAT 3       /* DRAM */
 +#define RAPL_IDX_PP1_NRG_STAT 3       /* gpu */
  #define INTEL_RAPL_PP1                0x4     /* pseudo-encoding */
  
  /* Clients have PP0, PKG */
@@@ -72,12 -72,6 +72,12 @@@
                         1<<RAPL_IDX_PKG_NRG_STAT|\
                         1<<RAPL_IDX_RAM_NRG_STAT)
  
 +/* Servers have PP0, PKG, RAM, PP1 */
 +#define RAPL_IDX_HSW  (1<<RAPL_IDX_PP0_NRG_STAT|\
 +                       1<<RAPL_IDX_PKG_NRG_STAT|\
 +                       1<<RAPL_IDX_RAM_NRG_STAT|\
 +                       1<<RAPL_IDX_PP1_NRG_STAT)
 +
  /*
   * event code: LSB 8 bits, passed in attr->config
   * any other bit is reserved
@@@ -431,24 -425,6 +431,24 @@@ static struct attribute *rapl_events_cl
        NULL,
  };
  
 +static struct attribute *rapl_events_hsw_attr[] = {
 +      EVENT_PTR(rapl_cores),
 +      EVENT_PTR(rapl_pkg),
 +      EVENT_PTR(rapl_gpu),
 +      EVENT_PTR(rapl_ram),
 +
 +      EVENT_PTR(rapl_cores_unit),
 +      EVENT_PTR(rapl_pkg_unit),
 +      EVENT_PTR(rapl_gpu_unit),
 +      EVENT_PTR(rapl_ram_unit),
 +
 +      EVENT_PTR(rapl_cores_scale),
 +      EVENT_PTR(rapl_pkg_scale),
 +      EVENT_PTR(rapl_gpu_scale),
 +      EVENT_PTR(rapl_ram_scale),
 +      NULL,
 +};
 +
  static struct attribute_group rapl_pmu_events_group = {
        .name = "events",
        .attrs = NULL, /* patched at runtime */
@@@ -655,14 -631,11 +655,14 @@@ static int __init rapl_pmu_init(void
        switch (boot_cpu_data.x86_model) {
        case 42: /* Sandy Bridge */
        case 58: /* Ivy Bridge */
 -      case 60: /* Haswell */
 -      case 69: /* Haswell-Celeron */
                rapl_cntr_mask = RAPL_IDX_CLN;
                rapl_pmu_events_group.attrs = rapl_events_cln_attr;
                break;
 +      case 60: /* Haswell */
 +      case 69: /* Haswell-Celeron */
 +              rapl_cntr_mask = RAPL_IDX_HSW;
 +              rapl_pmu_events_group.attrs = rapl_events_hsw_attr;
 +              break;
        case 45: /* Sandy Bridge-EP */
        case 62: /* IvyTown */
                rapl_cntr_mask = RAPL_IDX_SRV;
@@@ -673,19 -646,20 +673,20 @@@
                /* unsupported */
                return 0;
        }
-       get_online_cpus();
+ 
+       cpu_notifier_register_begin();
  
        for_each_online_cpu(cpu) {
                rapl_cpu_prepare(cpu);
                rapl_cpu_init(cpu);
        }
  
-       perf_cpu_notifier(rapl_cpu_notifier);
+       __perf_cpu_notifier(rapl_cpu_notifier);
  
        ret = perf_pmu_register(&rapl_pmu_class, "power", -1);
        if (WARN_ON(ret)) {
                pr_info("RAPL PMU detected, registration failed (%d), RAPL PMU disabled\n", ret);
-               put_online_cpus();
+               cpu_notifier_register_done();
                return -1;
        }
  
@@@ -699,7 -673,7 +700,7 @@@
                hweight32(rapl_cntr_mask),
                ktime_to_ms(pmu->timer_interval));
  
-       put_online_cpus();
+       cpu_notifier_register_done();
  
        return 0;
  }