drm/amd/display: Update stream mask
authorDuncan Ma <duncan.ma@amd.com>
Wed, 27 Sep 2023 19:17:27 +0000 (15:17 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Oct 2023 20:58:21 +0000 (16:58 -0400)
[Why]
Whenever stream changes because of new
pipe arrangements such as ODM. The new
stream mask is not reflected in DMCUB.

The mismatch in stream mask is blocking ips
entry in some scenarios.

[How]
Whenever stream arrangement changes,
update stream mask and notify DMCUB.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c

index 8c865c9fede43c8840756486e4e6fe93c97f1b6e..2968052001cd847388c1c94213661a5b5d89c96b 100644 (file)
@@ -3585,6 +3585,7 @@ static void commit_planes_for_stream(struct dc *dc,
        bool should_lock_all_pipes = (update_type != UPDATE_TYPE_FAST);
        bool subvp_prev_use = false;
        bool subvp_curr_use = false;
+       uint8_t current_stream_mask = 0;
 
        // Once we apply the new subvp context to hardware it won't be in the
        // dc->current_state anymore, so we have to cache it before we apply
@@ -3934,6 +3935,12 @@ static void commit_planes_for_stream(struct dc *dc,
                if (pipe_ctx->stream_res.tg->funcs->program_manual_trigger)
                        pipe_ctx->stream_res.tg->funcs->program_manual_trigger(pipe_ctx->stream_res.tg);
        }
+
+       current_stream_mask = get_stream_mask(dc, context);
+       if (current_stream_mask != context->stream_mask) {
+               context->stream_mask = current_stream_mask;
+               dc_dmub_srv_notify_stream_mask(dc->ctx->dmub_srv, current_stream_mask);
+       }
 }
 
 /**