drm/xe/guc: Bump the recommended GuC version to 70.44.1

A new workaround requires a newer GuC version. So, recommend that
users install it.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://lore.kernel.org/r/20250403185619.1555853-6-John.C.Harrison@Intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 4a16d3c40ea9f66a4dc8bf4b9408c90921f7ffe1..2741849bbf4df3d4a00bdf52480771b9737f8045 100644 (file)
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -114,16 +114,16 @@ struct fw_blobs_by_type {
 #define XE_GT_TYPE_ANY XE_GT_TYPE_UNINITIALIZED
 
 #define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver, major_ver)                                       \
-       fw_def(BATTLEMAGE,      GT_TYPE_ANY,    major_ver(xe,   guc,    bmg,    70, 29, 2))     \
-       fw_def(LUNARLAKE,       GT_TYPE_ANY,    major_ver(xe,   guc,    lnl,    70, 29, 2))     \
-       fw_def(METEORLAKE,      GT_TYPE_ANY,    major_ver(i915, guc,    mtl,    70, 29, 2))     \
-       fw_def(DG2,             GT_TYPE_ANY,    major_ver(i915, guc,    dg2,    70, 29, 2))     \
-       fw_def(DG1,             GT_TYPE_ANY,    major_ver(i915, guc,    dg1,    70, 29, 2))     \
-       fw_def(ALDERLAKE_N,     GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 29, 2))     \
-       fw_def(ALDERLAKE_P,     GT_TYPE_ANY,    major_ver(i915, guc,    adlp,   70, 29, 2))     \
-       fw_def(ALDERLAKE_S,     GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 29, 2))     \
-       fw_def(ROCKETLAKE,      GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 29, 2))     \
-       fw_def(TIGERLAKE,       GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 29, 2))
+       fw_def(BATTLEMAGE,      GT_TYPE_ANY,    major_ver(xe,   guc,    bmg,    70, 44, 1))     \
+       fw_def(LUNARLAKE,       GT_TYPE_ANY,    major_ver(xe,   guc,    lnl,    70, 44, 1))     \
+       fw_def(METEORLAKE,      GT_TYPE_ANY,    major_ver(i915, guc,    mtl,    70, 44, 1))     \
+       fw_def(DG2,             GT_TYPE_ANY,    major_ver(i915, guc,    dg2,    70, 44, 1))     \
+       fw_def(DG1,             GT_TYPE_ANY,    major_ver(i915, guc,    dg1,    70, 44, 1))     \
+       fw_def(ALDERLAKE_N,     GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 44, 1))     \
+       fw_def(ALDERLAKE_P,     GT_TYPE_ANY,    major_ver(i915, guc,    adlp,   70, 44, 1))     \
+       fw_def(ALDERLAKE_S,     GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 44, 1))     \
+       fw_def(ROCKETLAKE,      GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 44, 1))     \
+       fw_def(TIGERLAKE,       GT_TYPE_ANY,    major_ver(i915, guc,    tgl,    70, 44, 1))
 
 #define XE_HUC_FIRMWARE_DEFS(fw_def, mmp_ver, no_ver)          \
        fw_def(BATTLEMAGE,      GT_TYPE_ANY,    no_ver(xe,      huc,            bmg))           \