drm/amdgpu/gfx11: update mqd init for UQ
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 18 Oct 2024 18:14:34 +0000 (14:14 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 8 Apr 2025 20:48:18 +0000 (16:48 -0400)
Set the addresses for the UQ metadata.

V2: Fix lower address (Shashank)
V3: Restore lower_32_bits() for MQD addresses (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

index 933c4ad5eff9bf0bbd9200582502b1cc1b8cb9e3..b8f75e1ba72ca2af4416f22fd4fca621275f3f21 100644 (file)
@@ -4127,6 +4127,14 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
        /* active the queue */
        mqd->cp_gfx_hqd_active = 1;
 
+       /* set gfx UQ items */
+       mqd->shadow_base_lo = lower_32_bits(prop->shadow_addr);
+       mqd->shadow_base_hi = upper_32_bits(prop->shadow_addr);
+       mqd->gds_bkup_base_lo = lower_32_bits(prop->gds_bkup_addr);
+       mqd->gds_bkup_base_hi = upper_32_bits(prop->gds_bkup_addr);
+       mqd->fw_work_area_base_lo = lower_32_bits(prop->csa_addr);
+       mqd->fw_work_area_base_hi = upper_32_bits(prop->csa_addr);
+
        return 0;
 }