ASoC: SOF: Intel: hda: Define rom_status_reg in sof_intel_dsp_desc

Add the rom_status_reg field to struct sof_intel_dsp_desc and define
it for HDA platforms. This will be used to check the ROM status during
FW boot.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20220414184817.362215-14-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/sof/intel/apl.c b/sound/soc/sof/intel/apl.c
index b3e3f2494c74d9c0f6f341195c2ea472903d9912..4762846d8a336159a6982b180704ff900315af68 100644 (file)
--- a/sound/soc/sof/intel/apl.c
+++ b/sound/soc/sof/intel/apl.c
@@ -71,6 +71,7 @@ const struct sof_intel_dsp_desc apl_chip_info = {
        .ipc_ack = HDA_DSP_REG_HIPCIE,
        .ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE,
        .ipc_ctl = HDA_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 150,
        .ssp_count = APL_SSP_COUNT,
        .ssp_base_offset = APL_SSP_BASE_OFFSET,

diff --git a/sound/soc/sof/intel/cnl.c b/sound/soc/sof/intel/cnl.c
index ab1f45bfc83b451f029f6057f0bfea9e6b5c4354..86b683486f06f6a1dbc0845d9c7be61740c588fd 100644 (file)
--- a/sound/soc/sof/intel/cnl.c
+++ b/sound/soc/sof/intel/cnl.c
@@ -289,6 +289,7 @@ const struct sof_intel_dsp_desc cnl_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = CNL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,
@@ -316,6 +317,7 @@ const struct sof_intel_dsp_desc jsl_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = ICL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,

diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c
index 625bc1e67f1ee918381f3c967031c962c6542058..f6c50ee526fa1e02d8adfc8e0bdd84822c4197a0 100644 (file)
--- a/sound/soc/sof/intel/hda-loader.c
+++ b/sound/soc/sof/intel/hda-loader.c
@@ -171,7 +171,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag)
 
        /* step 7: wait for ROM init */
        ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR,
-                                       HDA_DSP_SRAM_REG_ROM_STATUS, status,
+                                       chip->rom_status_reg, status,
                                        ((status & HDA_DSP_ROM_STS_MASK)
                                                == HDA_DSP_ROM_INIT),
                                        HDA_DSP_REG_POLL_INTERVAL_US,
@@ -188,8 +188,8 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag)
 
        if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
                dev_err(sdev->dev,
-                       "error: %s: timeout HDA_DSP_SRAM_REG_ROM_STATUS read\n",
-                       __func__);
+                       "%s: timeout with rom_status_reg (%#x) read\n",
+                       __func__, chip->rom_status_reg);
 
 err:
        flags = SOF_DBG_DUMP_PCI | SOF_DBG_DUMP_MBOX | SOF_DBG_DUMP_OPTIONAL;
@@ -268,6 +268,8 @@ static int cl_cleanup(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab,
 
 static int cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream)
 {
+       struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
+       const struct sof_intel_dsp_desc *chip = hda->desc;
        unsigned int reg;
        int ret, status;
 
@@ -278,7 +280,7 @@ static int cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_str
        }
 
        status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR,
-                                       HDA_DSP_SRAM_REG_ROM_STATUS, reg,
+                                       chip->rom_status_reg, reg,
                                        ((reg & HDA_DSP_ROM_STS_MASK)
                                                == HDA_DSP_ROM_FW_ENTERED),
                                        HDA_DSP_REG_POLL_INTERVAL_US,
@@ -291,8 +293,8 @@ static int cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_str
 
        if (status < 0) {
                dev_err(sdev->dev,
-                       "error: %s: timeout HDA_DSP_SRAM_REG_ROM_STATUS read\n",
-                       __func__);
+                       "%s: timeout with rom_status_reg (%#x) read\n",
+                       __func__, chip->rom_status_reg);
        }
 
        ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP);

diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c
index af3693d820fd72bccc22809d8a62fbb7991c001f..d34cd4d341c5ede2ef79e1eca26a879fa60abb1c 100644 (file)
--- a/sound/soc/sof/intel/hda.c
+++ b/sound/soc/sof/intel/hda.c
@@ -406,11 +406,13 @@ static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
 
 static void hda_dsp_get_status(struct snd_sof_dev *sdev, const char *level)
 {
+       const struct sof_intel_dsp_desc *chip;
        u32 status;
        int i;
 
+       chip = get_chip_info(sdev->pdata);
        status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
-                                 HDA_DSP_SRAM_REG_ROM_STATUS);
+                                 chip->rom_status_reg);
 
        for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
                if (status == hda_dsp_rom_msg[i].code) {
@@ -456,13 +458,15 @@ static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level,
                                        u32 flags)
 {
+       const struct sof_intel_dsp_desc *chip;
        char msg[128];
        int len = 0;
        u32 value;
        int i;
 
+       chip = get_chip_info(sdev->pdata);
        for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) {
-               value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_ROM_STATUS + i * 0x4);
+               value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4);
                len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value);
        }
 

diff --git a/sound/soc/sof/intel/icl.c b/sound/soc/sof/intel/icl.c
index 964014239afdd3396c2d821abca73f248ec9f29e..2e4d371f7860d1e3443115072091798e711c2fc5 100644 (file)
--- a/sound/soc/sof/intel/icl.c
+++ b/sound/soc/sof/intel/icl.c
@@ -134,6 +134,7 @@ const struct sof_intel_dsp_desc icl_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = ICL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,

diff --git a/sound/soc/sof/intel/shim.h b/sound/soc/sof/intel/shim.h
index fd64377de9a09e38f66e4d3956c58541b3831f49..3eb09941ae6e9a44c4b58e3947803a42fbecf834 100644 (file)
--- a/sound/soc/sof/intel/shim.h
+++ b/sound/soc/sof/intel/shim.h
@@ -164,6 +164,7 @@ struct sof_intel_dsp_desc {
        int ipc_ack;
        int ipc_ack_mask;
        int ipc_ctl;
+       int rom_status_reg;
        int rom_init_timeout;
        int ssp_count;                  /* ssp count of the platform */
        int ssp_base_offset;            /* base address of the SSPs */

diff --git a/sound/soc/sof/intel/tgl.c b/sound/soc/sof/intel/tgl.c
index d0f805c67d5b0bbe6cc916818cd86a0a06daf78e..32d7e15126c266f2b507afbc4ffbaa5d02c9de32 100644 (file)
--- a/sound/soc/sof/intel/tgl.c
+++ b/sound/soc/sof/intel/tgl.c
@@ -105,6 +105,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = ICL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,
@@ -125,6 +126,7 @@ const struct sof_intel_dsp_desc tglh_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = ICL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,
@@ -145,6 +147,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = ICL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,
@@ -165,6 +168,7 @@ const struct sof_intel_dsp_desc adls_chip_info = {
        .ipc_ack = CNL_DSP_REG_HIPCIDA,
        .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
        .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
        .rom_init_timeout       = 300,
        .ssp_count = ICL_SSP_COUNT,
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,