drm/amdgpu: correct the name of mes_pipe structure

Correct the structure name admgpu_mes_pipe to amdgpu_mes_pipe.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 2df2444ee892cd1d8cac7efc97c886e57ed28db8..5189a7ac65b343300e9045e4f05a83d6e7784a65 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -56,7 +56,7 @@ enum amdgpu_mes_priority_level {
 
 struct amdgpu_mes_funcs;
 
-enum admgpu_mes_pipe {
+enum amdgpu_mes_pipe {
        AMDGPU_MES_SCHED_PIPE = 0,
        AMDGPU_MES_KIQ_PIPE,
        AMDGPU_MAX_MES_PIPES = 2,

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 747b05d9b3cfaf1e13eb7512ec2eae70bdeab41f..f57ec3613d21c1ab04daf008270793c35b649895 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -800,7 +800,7 @@ static const struct amdgpu_mes_funcs mes_v11_0_funcs = {
 };
 
 static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,
-                                          enum admgpu_mes_pipe pipe)
+                                          enum amdgpu_mes_pipe pipe)
 {
        int r;
        const struct mes_firmware_header_v1_0 *mes_hdr;
@@ -835,7 +835,7 @@ static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,
 }
 
 static int mes_v11_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
-                                               enum admgpu_mes_pipe pipe)
+                                               enum amdgpu_mes_pipe pipe)
 {
        int r;
        const struct mes_firmware_header_v1_0 *mes_hdr;
@@ -876,7 +876,7 @@ static int mes_v11_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
 }
 
 static void mes_v11_0_free_ucode_buffers(struct amdgpu_device *adev,
-                                        enum admgpu_mes_pipe pipe)
+                                        enum amdgpu_mes_pipe pipe)
 {
        amdgpu_bo_free_kernel(&adev->mes.data_fw_obj[pipe],
                              &adev->mes.data_fw_gpu_addr[pipe],
@@ -974,7 +974,7 @@ static void mes_v11_0_enable(struct amdgpu_device *adev, bool enable)
 
 /* This function is for backdoor MES firmware */
 static int mes_v11_0_load_microcode(struct amdgpu_device *adev,
-                                   enum admgpu_mes_pipe pipe, bool prime_icache)
+                                   enum amdgpu_mes_pipe pipe, bool prime_icache)
 {
        int r;
        uint32_t data;
@@ -1046,7 +1046,7 @@ static int mes_v11_0_load_microcode(struct amdgpu_device *adev,
 }
 
 static int mes_v11_0_allocate_eop_buf(struct amdgpu_device *adev,
-                                     enum admgpu_mes_pipe pipe)
+                                     enum amdgpu_mes_pipe pipe)
 {
        int r;
        u32 *eop;
@@ -1257,7 +1257,7 @@ static int mes_v11_0_kiq_enable_queue(struct amdgpu_device *adev)
 }
 
 static int mes_v11_0_queue_init(struct amdgpu_device *adev,
-                               enum admgpu_mes_pipe pipe)
+                               enum amdgpu_mes_pipe pipe)
 {
        struct amdgpu_ring *ring;
        int r;
@@ -1340,7 +1340,7 @@ static int mes_v11_0_kiq_ring_init(struct amdgpu_device *adev)
 }
 
 static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,
-                                enum admgpu_mes_pipe pipe)
+                                enum amdgpu_mes_pipe pipe)
 {
        int r, mqd_size = sizeof(struct v11_compute_mqd);
        struct amdgpu_ring *ring;

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 8d7cf40030f2f3be1bb0c0b53c253e7339c0c1bb..4949103800578e61cbe0fb13c7abacc83d57688c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -901,7 +901,7 @@ static const struct amdgpu_mes_funcs mes_v12_0_funcs = {
 };
 
 static int mes_v12_0_allocate_ucode_buffer(struct amdgpu_device *adev,
-                                          enum admgpu_mes_pipe pipe)
+                                          enum amdgpu_mes_pipe pipe)
 {
        int r;
        const struct mes_firmware_header_v1_0 *mes_hdr;
@@ -935,7 +935,7 @@ static int mes_v12_0_allocate_ucode_buffer(struct amdgpu_device *adev,
 }
 
 static int mes_v12_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
-                                               enum admgpu_mes_pipe pipe)
+                                               enum amdgpu_mes_pipe pipe)
 {
        int r;
        const struct mes_firmware_header_v1_0 *mes_hdr;
@@ -969,7 +969,7 @@ static int mes_v12_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
 }
 
 static void mes_v12_0_free_ucode_buffers(struct amdgpu_device *adev,
-                                        enum admgpu_mes_pipe pipe)
+                                        enum amdgpu_mes_pipe pipe)
 {
        amdgpu_bo_free_kernel(&adev->mes.data_fw_obj[pipe],
                              &adev->mes.data_fw_gpu_addr[pipe],
@@ -1075,7 +1075,7 @@ static void mes_v12_0_set_ucode_start_addr(struct amdgpu_device *adev)
 
 /* This function is for backdoor MES firmware */
 static int mes_v12_0_load_microcode(struct amdgpu_device *adev,
-                                   enum admgpu_mes_pipe pipe, bool prime_icache)
+                                   enum amdgpu_mes_pipe pipe, bool prime_icache)
 {
        int r;
        uint32_t data;
@@ -1139,7 +1139,7 @@ static int mes_v12_0_load_microcode(struct amdgpu_device *adev,
 }
 
 static int mes_v12_0_allocate_eop_buf(struct amdgpu_device *adev,
-                                     enum admgpu_mes_pipe pipe)
+                                     enum amdgpu_mes_pipe pipe)
 {
        int r;
        u32 *eop;
@@ -1360,7 +1360,7 @@ static int mes_v12_0_kiq_enable_queue(struct amdgpu_device *adev)
 }
 
 static int mes_v12_0_queue_init(struct amdgpu_device *adev,
-                               enum admgpu_mes_pipe pipe)
+                               enum amdgpu_mes_pipe pipe)
 {
        struct amdgpu_ring *ring;
        int r;
@@ -1460,7 +1460,7 @@ static int mes_v12_0_kiq_ring_init(struct amdgpu_device *adev)
 }
 
 static int mes_v12_0_mqd_sw_init(struct amdgpu_device *adev,
-                                enum admgpu_mes_pipe pipe)
+                                enum amdgpu_mes_pipe pipe)
 {
        int r, mqd_size = sizeof(struct v12_compute_mqd);
        struct amdgpu_ring *ring;