arm64: dts: imx95: add sai[1..6], xcvr and micfill

Add sai[1..6], NXP Audio Transceiver (XCVR) Controller and  MICFIL Digital
Audio Interface (MICFIL).

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 58c4945871d0cc70357b1488f48aa6b5e6709294..99764bfe3089a8ec3ad2043accd02f1bd934c961 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -222,6 +222,13 @@
                };
        };
 
+       dummy: clock-dummy {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+               clock-output-names = "dummy";
+       };
+
        clk_ext1: clock-ext1 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
@@ -706,6 +713,64 @@
                                status = "disabled";
                        };
 
+                       sai3: sai@42650000 {
+                               compatible = "fsl,imx95-sai";
+                               reg = <0x42650000 0x10000>;
+                               interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>, <&dummy>,
+                                        <&scmi_clk IMX95_CLK_SAI3>, <&dummy>,
+                                        <&dummy>;
+                               clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                               dmas = <&edma2 61 0 FSL_EDMA_RX>, <&edma2 60 0 0>;
+                               dma-names = "rx", "tx";
+                               status = "disabled";
+                       };
+
+                       sai4: sai@42660000 {
+                               compatible = "fsl,imx95-sai";
+                               reg = <0x42660000 0x10000>;
+                               interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>, <&dummy>,
+                                        <&scmi_clk IMX95_CLK_SAI4>, <&dummy>,
+                                        <&dummy>;
+                               clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                               dmas = <&edma2 68 0 FSL_EDMA_RX>, <&edma2 67 0 0>;
+                               dma-names = "rx", "tx";
+                               status = "disabled";
+                       };
+
+                       sai5: sai@42670000 {
+                               compatible = "fsl,imx95-sai";
+                               reg = <0x42670000 0x10000>;
+                               interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>, <&dummy>,
+                                        <&scmi_clk IMX95_CLK_SAI5>, <&dummy>,
+                                        <&dummy>;
+                               clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                               dmas = <&edma2 70 0 FSL_EDMA_RX>, <&edma2 69 0 0>;
+                               dma-names = "rx", "tx";
+                               status = "disabled";
+                       };
+
+                       xcvr: xcvr@42680000 {
+                               compatible = "fsl,imx95-xcvr";
+                               reg = <0x42680000 0x800>, <0x42680800 0x400>,
+                                     <0x42680c00 0x080>, <0x42680e00 0x080>;
+                               reg-names = "ram", "regs", "rxfifo", "txfifo";
+                               interrupts = /* XCVR IRQ 0 */
+                                            <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+                                            /* XCVR IRQ 1 */
+                                            <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
+                                        <&scmi_clk IMX95_CLK_SPDIF>,
+                                        <&dummy>,
+                                        <&scmi_clk IMX95_CLK_AUDIOXCVR>;
+                               clock-names = "ipg", "phy", "spba", "pll_ipg";
+                               dmas = <&edma2 65 0 1>, <&edma2 66 0 0>;
+                               dma-names = "rx", "tx";
+                               status = "disabled";
+                       };
+
                        lpuart7: serial@42690000 {
                                compatible = "fsl,imx95-lpuart", "fsl,imx8ulp-lpuart",
                                             "fsl,imx7ulp-lpuart";
@@ -1124,6 +1189,38 @@
                                status = "disabled";
                        };
 
+                       sai1: sai@443b0000 {
+                               compatible = "fsl,imx95-sai";
+                               reg = <0x443b0000 0x10000>;
+                               interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSAON>, <&dummy>,
+                                        <&scmi_clk IMX95_CLK_SAI1>, <&dummy>,
+                                        <&dummy>;
+                               clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                               dmas = <&edma1 25 0 FSL_EDMA_RX>, <&edma1 24 0 0>;
+                               dma-names = "rx", "tx";
+                               status = "disabled";
+                       };
+
+                       micfil: micfil@44520000 {
+                               compatible = "fsl,imx95-micfil", "fsl,imx93-micfil";
+                               reg = <0x44520000 0x10000>;
+                               interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSAON>,
+                                        <&scmi_clk IMX95_CLK_PDM>,
+                                        <&scmi_clk IMX95_CLK_AUDIOPLL1>,
+                                        <&scmi_clk IMX95_CLK_AUDIOPLL2>,
+                                        <&dummy>;
+                               clock-names = "ipg_clk", "ipg_clk_app",
+                                             "pll8k", "pll11k", "clkext3";
+                               dmas = <&edma1 6 0 5>;
+                               dma-names = "rx";
+                               status = "disabled";
+                       };
+
                        adc1: adc@44530000 {
                                compatible = "nxp,imx93-adc";
                                reg = <0x44530000 0x10000>;
@@ -1423,5 +1520,19 @@
                        power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
                        status = "disabled";
                };
+
+               sai2: sai@4c880000 {
+                       compatible = "fsl,imx95-sai";
+                       reg = <0x0 0x4c880000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&scmi_clk IMX95_CLK_BUSNETCMIX>, <&dummy>,
+                                <&scmi_clk IMX95_CLK_SAI2>, <&dummy>,
+                                <&dummy>;
+                       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                       power-domains = <&scmi_devpd IMX95_PD_NETC>;
+                       dmas = <&edma2 59 0 FSL_EDMA_RX>, <&edma2 58 0 0>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
        };
 };