clk: renesas: cpg-lib: Move RPC clock registration to the library
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Wed, 6 Oct 2021 08:58:33 +0000 (10:58 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 8 Oct 2021 13:09:17 +0000 (15:09 +0200)
We want to reuse this code for V3U soon. Because its RPCCKCR register is
at a different offset, the moved functions do not use the base register
as an argument anymore but the RPCCKCR register itself. Verified that an
Eagle board with R-Car V3M still works.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211006085836.42155-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/rcar-cpg-lib.c
drivers/clk/renesas/rcar-cpg-lib.h
drivers/clk/renesas/rcar-gen3-cpg.c

index 5678768ee1f2ca5830a057daac2b520a6d9157b6..e93f0011eb076d638d13cc0f9502f08e8ecfee8c 100644 (file)
@@ -267,4 +267,87 @@ free_clock:
        return clk;
 }
 
+struct rpc_clock {
+       struct clk_divider div;
+       struct clk_gate gate;
+       /*
+        * One notifier covers both RPC and RPCD2 clocks as they are both
+        * controlled by the same RPCCKCR register...
+        */
+       struct cpg_simple_notifier csn;
+};
+
+static const struct clk_div_table cpg_rpc_div_table[] = {
+       { 1, 2 }, { 3, 4 }, { 5, 6 }, { 7, 8 }, { 0, 0 },
+};
+
+struct clk * __init cpg_rpc_clk_register(const char *name,
+       void __iomem *rpcckcr, const char *parent_name,
+       struct raw_notifier_head *notifiers)
+{
+       struct rpc_clock *rpc;
+       struct clk *clk;
+
+       rpc = kzalloc(sizeof(*rpc), GFP_KERNEL);
+       if (!rpc)
+               return ERR_PTR(-ENOMEM);
+
+       rpc->div.reg = rpcckcr;
+       rpc->div.width = 3;
+       rpc->div.table = cpg_rpc_div_table;
+       rpc->div.lock = &cpg_lock;
+
+       rpc->gate.reg = rpcckcr;
+       rpc->gate.bit_idx = 8;
+       rpc->gate.flags = CLK_GATE_SET_TO_DISABLE;
+       rpc->gate.lock = &cpg_lock;
+
+       rpc->csn.reg = rpcckcr;
+
+       clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
+                                    &rpc->div.hw,  &clk_divider_ops,
+                                    &rpc->gate.hw, &clk_gate_ops,
+                                    CLK_SET_RATE_PARENT);
+       if (IS_ERR(clk)) {
+               kfree(rpc);
+               return clk;
+       }
+
+       cpg_simple_notifier_register(notifiers, &rpc->csn);
+       return clk;
+}
+
+struct rpcd2_clock {
+       struct clk_fixed_factor fixed;
+       struct clk_gate gate;
+};
+
+struct clk * __init cpg_rpcd2_clk_register(const char *name,
+                                          void __iomem *rpcckcr,
+                                          const char *parent_name)
+{
+       struct rpcd2_clock *rpcd2;
+       struct clk *clk;
+
+       rpcd2 = kzalloc(sizeof(*rpcd2), GFP_KERNEL);
+       if (!rpcd2)
+               return ERR_PTR(-ENOMEM);
+
+       rpcd2->fixed.mult = 1;
+       rpcd2->fixed.div = 2;
+
+       rpcd2->gate.reg = rpcckcr;
+       rpcd2->gate.bit_idx = 9;
+       rpcd2->gate.flags = CLK_GATE_SET_TO_DISABLE;
+       rpcd2->gate.lock = &cpg_lock;
+
+       clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
+                                    &rpcd2->fixed.hw, &clk_fixed_factor_ops,
+                                    &rpcd2->gate.hw, &clk_gate_ops,
+                                    CLK_SET_RATE_PARENT);
+       if (IS_ERR(clk))
+               kfree(rpcd2);
+
+       return clk;
+}
 
index d00c91b116ca0e36f743514c53b0cead5bb4c46a..35c0217c2f8bc03d9d50806644f30b1f27879d45 100644 (file)
@@ -30,4 +30,11 @@ struct clk * __init cpg_sd_clk_register(const char *name,
        void __iomem *base, unsigned int offset, const char *parent_name,
        struct raw_notifier_head *notifiers, bool skip_first);
 
+struct clk * __init cpg_rpc_clk_register(const char *name,
+       void __iomem *rpcckcr, const char *parent_name,
+       struct raw_notifier_head *notifiers);
+
+struct clk * __init cpg_rpcd2_clk_register(const char *name,
+                                          void __iomem *rpcckcr,
+                                          const char *parent_name);
 #endif
index 558191c99b48d1f10bc23482126012cf1927f451..741f6e74bbcfcabc0154b259a0247d19ee3bc7c5 100644 (file)
@@ -301,95 +301,10 @@ static struct clk * __init cpg_z_clk_register(const char *name,
        return clk;
 }
 
-struct rpc_clock {
-       struct clk_divider div;
-       struct clk_gate gate;
-       /*
-        * One notifier covers both RPC and RPCD2 clocks as they are both
-        * controlled by the same RPCCKCR register...
-        */
-       struct cpg_simple_notifier csn;
-};
-
 static const struct clk_div_table cpg_rpcsrc_div_table[] = {
        { 2, 5 }, { 3, 6 }, { 0, 0 },
 };
 
-static const struct clk_div_table cpg_rpc_div_table[] = {
-       { 1, 2 }, { 3, 4 }, { 5, 6 }, { 7, 8 }, { 0, 0 },
-};
-
-static struct clk * __init cpg_rpc_clk_register(const char *name,
-       void __iomem *base, const char *parent_name,
-       struct raw_notifier_head *notifiers)
-{
-       struct rpc_clock *rpc;
-       struct clk *clk;
-
-       rpc = kzalloc(sizeof(*rpc), GFP_KERNEL);
-       if (!rpc)
-               return ERR_PTR(-ENOMEM);
-
-       rpc->div.reg = base + CPG_RPCCKCR;
-       rpc->div.width = 3;
-       rpc->div.table = cpg_rpc_div_table;
-       rpc->div.lock = &cpg_lock;
-
-       rpc->gate.reg = base + CPG_RPCCKCR;
-       rpc->gate.bit_idx = 8;
-       rpc->gate.flags = CLK_GATE_SET_TO_DISABLE;
-       rpc->gate.lock = &cpg_lock;
-
-       rpc->csn.reg = base + CPG_RPCCKCR;
-
-       clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
-                                    &rpc->div.hw,  &clk_divider_ops,
-                                    &rpc->gate.hw, &clk_gate_ops,
-                                    CLK_SET_RATE_PARENT);
-       if (IS_ERR(clk)) {
-               kfree(rpc);
-               return clk;
-       }
-
-       cpg_simple_notifier_register(notifiers, &rpc->csn);
-       return clk;
-}
-
-struct rpcd2_clock {
-       struct clk_fixed_factor fixed;
-       struct clk_gate gate;
-};
-
-static struct clk * __init cpg_rpcd2_clk_register(const char *name,
-                                                 void __iomem *base,
-                                                 const char *parent_name)
-{
-       struct rpcd2_clock *rpcd2;
-       struct clk *clk;
-
-       rpcd2 = kzalloc(sizeof(*rpcd2), GFP_KERNEL);
-       if (!rpcd2)
-               return ERR_PTR(-ENOMEM);
-
-       rpcd2->fixed.mult = 1;
-       rpcd2->fixed.div = 2;
-
-       rpcd2->gate.reg = base + CPG_RPCCKCR;
-       rpcd2->gate.bit_idx = 9;
-       rpcd2->gate.flags = CLK_GATE_SET_TO_DISABLE;
-       rpcd2->gate.lock = &cpg_lock;
-
-       clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
-                                    &rpcd2->fixed.hw, &clk_fixed_factor_ops,
-                                    &rpcd2->gate.hw, &clk_gate_ops,
-                                    CLK_SET_RATE_PARENT);
-       if (IS_ERR(clk))
-               kfree(rpcd2);
-
-       return clk;
-}
-
-
 static const struct rcar_gen3_cpg_pll_config *cpg_pll_config __initdata;
 static unsigned int cpg_clk_extalr __initdata;
 static u32 cpg_mode __initdata;
@@ -600,11 +515,11 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
                break;
 
        case CLK_TYPE_GEN3_RPC:
-               return cpg_rpc_clk_register(core->name, base,
+               return cpg_rpc_clk_register(core->name, base + CPG_RPCCKCR,
                                            __clk_get_name(parent), notifiers);
 
        case CLK_TYPE_GEN3_RPCD2:
-               return cpg_rpcd2_clk_register(core->name, base,
+               return cpg_rpcd2_clk_register(core->name, base + CPG_RPCCKCR,
                                              __clk_get_name(parent));
 
        default: