powerpc/64s: Rename EXCEPTION_RELON_PROLOG_PSERIES_1

The EXCEPTION_RELON_PROLOG_PSERIES_1() macro does the same job as
EXCEPTION_PROLOG_2 (which we just recently created), except for
"RELON" (relocation on) exceptions.

So rename it as such.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index d6f058b88e6d50ec60a68b4be479d888483a37fc..e63a3dc769f625cad8415d32c7572ec7f21b45c1 100644 (file)
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -157,7 +157,7 @@
        b       hrfi_flush_fallback
 
 #ifdef CONFIG_RELOCATABLE
-#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)                   \
+#define __EXCEPTION_PROLOG_2_RELON(label, h)                           \
        mfspr   r11,SPRN_##h##SRR0;     /* save SRR0 */                 \
        LOAD_HANDLER(r12,label);                                        \
        mtctr   r12;                                                    \
@@ -167,26 +167,26 @@
        bctr;
 #else
 /* If not relocatable, we can jump directly -- and save messing with LR */
-#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)                   \
+#define __EXCEPTION_PROLOG_2_RELON(label, h)                           \
        mfspr   r11,SPRN_##h##SRR0;     /* save SRR0 */                 \
        mfspr   r12,SPRN_##h##SRR1;     /* and SRR1 */                  \
        li      r10,MSR_RI;                                             \
        mtmsrd  r10,1;                  /* Set RI (EE=0) */             \
        b       label;
 #endif
-#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)                     \
-       __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)                    \
+#define EXCEPTION_PROLOG_2_RELON(label, h)                             \
+       __EXCEPTION_PROLOG_2_RELON(label, h)
 
 /*
  * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
  * so no need to rfid.  Save lr in case we're CONFIG_RELOCATABLE, in which
- * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
+ * case EXCEPTION_PROLOG_2_RELON will be using LR.
  */
 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec)     \
        SET_SCRATCH0(r13);              /* save r13 */                  \
        EXCEPTION_PROLOG_0(area);                                       \
        EXCEPTION_PROLOG_1(area, extra, vec);                           \
-       EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
+       EXCEPTION_PROLOG_2_RELON(label, h)
 
 /*
  * We're short on space and time in the exception prolog, so we can't
@@ -581,7 +581,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 
 #define STD_RELON_EXCEPTION_OOL(vec, label)                    \
        EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec);            \
-       EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD)
+       EXCEPTION_PROLOG_2_RELON(label, EXC_STD)
 
 #define STD_RELON_EXCEPTION_HV(loc, vec, label)                \
        EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label,       \
@@ -589,7 +589,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 
 #define STD_RELON_EXCEPTION_HV_OOL(vec, label)                 \
        EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);        \
-       EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
+       EXCEPTION_PROLOG_2_RELON(label, EXC_HV)
 
 /* This associate vector numbers with bits in paca->irq_happened */
 #define SOFTEN_VALUE_0x500     PACA_IRQ_EE
@@ -655,7 +655,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
        SET_SCRATCH0(r13);    /* save r13 */                            \
        EXCEPTION_PROLOG_0(PACA_EXGEN);                                 \
        MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);   \
-       EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
+       EXCEPTION_PROLOG_2_RELON(label, h)
 
 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)\
        __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)
@@ -674,7 +674,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 
 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask)           \
        MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
-       EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
+       EXCEPTION_PROLOG_2_RELON(label, EXC_HV)
 
 /*
  * Our exception common code can be passed various "additions"