LPIATE enables the hardware timer for entering LPI mode. To sure that
the correct mode is used, clear LPIATE when using manual/software-timed
mode to prevent the hardware using the timer.
stmmac_main.c avoids this being a problem at the moment by calling
stmmac_set_eee_lpi_timer(..., 0) before switching to software mode.
We no longer need to call stmmac_set_eee_lpi_timer(..., 0) when
disabling EEE as stmmac_reset_eee_mode() will now clear all LPI
settings.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1tffdD-003ZHh-Ew@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* state.
*/
value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
+ value &= ~GMAC4_LPI_CTRL_STATUS_LPIATE;
value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;
if (en_tx_lpi_clockgating)
u32 value;
value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
- value &= ~(GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA);
+ value &= ~(GMAC4_LPI_CTRL_STATUS_LPIATE | GMAC4_LPI_CTRL_STATUS_LPIEN |
+ GMAC4_LPI_CTRL_STATUS_LPITXA);
writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
}
netdev_dbg(priv->dev, "disable EEE\n");
priv->eee_sw_timer_en = false;
del_timer_sync(&priv->eee_ctrl_timer);
- stmmac_disable_hw_lpi_timer(priv);
stmmac_reset_eee_mode(priv, priv->hw);
stmmac_set_eee_timer(priv, priv->hw, 0,
STMMAC_DEFAULT_TWT_LS);