arm64: Add PAR_EL1 field description
authorMarc Zyngier <maz@kernel.org>
Tue, 18 Jun 2024 09:10:19 +0000 (10:10 +0100)
committerMarc Zyngier <maz@kernel.org>
Fri, 30 Aug 2024 11:04:19 +0000 (12:04 +0100)
As KVM is about to grow a full emulation for the AT instructions,
add the layout of the PAR_EL1 register in its non-D128 configuration.

Note that the constants are a bit ugly, as the register has two
layouts, based on the state of the F bit.

Signed-off-by: Marc Zyngier <maz@kernel.org>
arch/arm64/include/asm/sysreg.h

index 4a9ea103817e896f9c0f74d2f4285fb0915c8835..d9d5e07f768d0d2d39fe1d2d95293cf63b7f92b8 100644 (file)
 #define SYS_PAR_EL1                    sys_reg(3, 0, 7, 4, 0)
 
 #define SYS_PAR_EL1_F                  BIT(0)
+/* When PAR_EL1.F == 1 */
 #define SYS_PAR_EL1_FST                        GENMASK(6, 1)
+#define SYS_PAR_EL1_PTW                        BIT(8)
+#define SYS_PAR_EL1_S                  BIT(9)
+#define SYS_PAR_EL1_AssuredOnly                BIT(12)
+#define SYS_PAR_EL1_TopLevel           BIT(13)
+#define SYS_PAR_EL1_Overlay            BIT(14)
+#define SYS_PAR_EL1_DirtyBit           BIT(15)
+#define SYS_PAR_EL1_F1_IMPDEF          GENMASK_ULL(63, 48)
+#define SYS_PAR_EL1_F1_RES0            (BIT(7) | BIT(10) | GENMASK_ULL(47, 16))
+#define SYS_PAR_EL1_RES1               BIT(11)
+/* When PAR_EL1.F == 0 */
+#define SYS_PAR_EL1_SH                 GENMASK_ULL(8, 7)
+#define SYS_PAR_EL1_NS                 BIT(9)
+#define SYS_PAR_EL1_F0_IMPDEF          BIT(10)
+#define SYS_PAR_EL1_NSE                        BIT(11)
+#define SYS_PAR_EL1_PA                 GENMASK_ULL(51, 12)
+#define SYS_PAR_EL1_ATTR               GENMASK_ULL(63, 56)
+#define SYS_PAR_EL1_F0_RES0            (GENMASK_ULL(6, 1) | GENMASK_ULL(55, 52))
 
 /*** Statistical Profiling Extension ***/
 #define PMSEVFR_EL1_RES0_IMP   \