drm/i915: Fix transcoder_has_m2_n2()

M2/N2 values are present for all ilk-ivb,vlv,chv (and hsw edp).
Make the code reflect that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-13-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 76c6ccfce56bd87b2bc5ab3bfe0745603147d9cc..319c73d96d9611625a3cb9853c09f4b663127587 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3154,11 +3154,7 @@ static bool transcoder_has_m2_n2(struct drm_i915_private *dev_priv,
        if (IS_HASWELL(dev_priv))
                return transcoder == TRANSCODER_EDP;
 
-       /*
-        * Strictly speaking some registers are available before
-        * gen7, but we only support DRRS on gen7+
-        */
-       return DISPLAY_VER(dev_priv) == 7 || IS_CHERRYVIEW(dev_priv);
+       return IS_DISPLAY_VER(dev_priv, 5, 7) || IS_CHERRYVIEW(dev_priv);
 }
 
 void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc,