drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven
authorYong Zhao <Yong.Zhao@amd.com>
Thu, 31 Aug 2017 19:55:00 +0000 (15:55 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Oct 2017 20:30:16 +0000 (16:30 -0400)
Without the additional bits set in PDEs/PTEs, the ATC memory access
would have failed on Raven.

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

index fee0a32ac56f65b32f4e15a966afbca1baced4b1..b500bb6a8491fa4b976aaeefd45625312d167d1b 100644 (file)
@@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
                                AMDGPU_GEM_CREATE_SHADOW);
 
        if (vm->pte_support_ats) {
-               init_value = AMDGPU_PTE_SYSTEM;
+               init_value = AMDGPU_PTE_DEFAULT_ATC;
                if (level != adev->vm_manager.num_level - 1)
                        init_value |= AMDGPU_PDE_PTE;
+
        }
 
        /* walk over the address space and allocate the page tables */
@@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
                list_del(&mapping->list);
 
                if (vm->pte_support_ats)
-                       init_pte_value = AMDGPU_PTE_SYSTEM;
+                       init_pte_value = AMDGPU_PTE_DEFAULT_ATC;
 
                r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm,
                                                mapping->start, mapping->last,
@@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 
                if (adev->asic_type == CHIP_RAVEN) {
                        vm->pte_support_ats = true;
-                       init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE;
+                       init_pde_value = AMDGPU_PTE_DEFAULT_ATC
+                                       | AMDGPU_PDE_PTE;
+
                }
        } else
                vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
index d68f39b4e5e71770f9d5622cf1aada5d8053bae1..aa914256b4bc75d98015ced2bbe413799f8d3466 100644 (file)
@@ -73,6 +73,16 @@ struct amdgpu_bo_list_entry;
 #define AMDGPU_PTE_MTYPE(a)    ((uint64_t)a << 57)
 #define AMDGPU_PTE_MTYPE_MASK  AMDGPU_PTE_MTYPE(3ULL)
 
+/* For Raven */
+#define AMDGPU_MTYPE_CC 2
+
+#define AMDGPU_PTE_DEFAULT_ATC  (AMDGPU_PTE_SYSTEM      \
+                                | AMDGPU_PTE_SNOOPED    \
+                                | AMDGPU_PTE_EXECUTABLE \
+                                | AMDGPU_PTE_READABLE   \
+                                | AMDGPU_PTE_WRITEABLE  \
+                                | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC))
+
 /* How to programm VM fault handling */
 #define AMDGPU_VM_FAULT_STOP_NEVER     0
 #define AMDGPU_VM_FAULT_STOP_FIRST     1