ARM: OMAP24xx: PRM: add API for clearing wakeup status bits
authorTero Kristo <t-kristo@ti.com>
Wed, 26 Feb 2014 13:31:05 +0000 (15:31 +0200)
committerTero Kristo <t-kristo@ti.com>
Fri, 4 Jul 2014 14:02:16 +0000 (17:02 +0300)
This helps to isolate the PRM into its own driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
arch/arm/mach-omap2/pm24xx.c
arch/arm/mach-omap2/prm2xxx.c
arch/arm/mach-omap2/prm2xxx.h

index a5ea988ff340a217481289a1e9626949a7c9d2fd..d76694b7a59184125f00fe8a6d16a7a4a31a1dc8 100644 (file)
@@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void)
 
        /* Clear old wake-up events */
        /* REVISIT: These write to reserved bits? */
-       omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
-       omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
-       omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
+       omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+       omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+       omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
 
        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
@@ -104,23 +104,18 @@ no_sleep:
        clk_enable(osc_ck);
 
        /* clear CORE wake-up events */
-       omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
-       omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
+       omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+       omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
 
        /* wakeup domain events - bit 1: GPT1, bit5 GPIO */
-       omap2_prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
+       omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);
 
        /* MPU domain wake events */
-       l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
-       if (l & 0x01)
-               omap2_prm_write_mod_reg(0x01, OCP_MOD,
-                                 OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
-       if (l & 0x20)
-               omap2_prm_write_mod_reg(0x20, OCP_MOD,
-                                 OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
+       omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
+                                   0x1);
 
-       /* Mask future PRCM-to-MPU interrupts */
-       omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
+       omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
+                                   0x20);
 
        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
@@ -148,9 +143,9 @@ static void omap2_enter_mpu_retention(void)
         * it is in retention mode. */
        if (omap2_allow_mpu_retention()) {
                /* REVISIT: These write to reserved bits? */
-               omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
-               omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
-               omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
+               omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+               omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+               omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
 
                /* Try to enter MPU retention */
                pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
index a3a3cca2bcc4c203a9e77fdbd134cc36fcafe957..86958050547a4a803c6a86604c6ba17b2b5011e7 100644 (file)
@@ -114,6 +114,24 @@ void omap2xxx_prm_dpll_reset(void)
        omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
 }
 
+/**
+ * omap2xxx_prm_clear_mod_irqs - clear wakeup status bits for a module
+ * @module: PRM module to clear wakeups from
+ * @regs: register offset to clear
+ * @wkst_mask: wakeup status mask to clear
+ *
+ * Clears wakeup status bits for a given module, so that the device can
+ * re-enter idle.
+ */
+void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
+{
+       u32 wkst;
+
+       wkst = omap2_prm_read_mod_reg(module, regs);
+       wkst &= wkst_mask;
+       omap2_prm_write_mod_reg(wkst, module, regs);
+}
+
 int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
 {
        omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
index d2cb6365716f5565f6af33c3c2dfc7f4744f75cb..d73414139292478a99b3f35aaadb1bad0fdab0b7 100644 (file)
@@ -125,6 +125,7 @@ extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
 extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
 
 extern void omap2xxx_prm_dpll_reset(void);
+void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
 
 extern int __init omap2xxx_prm_init(void);