drm/vc4: crtc: Move debugfs_name to crtc_data
authorMaxime Ripard <maxime@cerno.tech>
Mon, 11 Jul 2022 17:38:50 +0000 (19:38 +0200)
committerMaxime Ripard <maxime@cerno.tech>
Wed, 13 Jul 2022 08:46:07 +0000 (10:46 +0200)
All the CRTCs, including the TXP, have a debugfs file and name so we can
consolidate it into vc4_crtc_data.

Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220711173939.1132294-21-maxime@cerno.tech
drivers/gpu/drm/vc4/vc4_crtc.c
drivers/gpu/drm/vc4/vc4_drv.h
drivers/gpu/drm/vc4/vc4_txp.c

index d7cc006b22c9ab8b3dbee75873cdd2ac8f698e15..bcce61879d530f22ee89c50f003cf22bd22d71bc 100644 (file)
@@ -1084,10 +1084,10 @@ static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
 
 static const struct vc4_pv_data bcm2835_pv0_data = {
        .base = {
+               .debugfs_name = "crtc0_regs",
                .hvs_available_channels = BIT(0),
                .hvs_output = 0,
        },
-       .debugfs_name = "crtc0_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 1,
        .encoder_types = {
@@ -1098,10 +1098,10 @@ static const struct vc4_pv_data bcm2835_pv0_data = {
 
 static const struct vc4_pv_data bcm2835_pv1_data = {
        .base = {
+               .debugfs_name = "crtc1_regs",
                .hvs_available_channels = BIT(2),
                .hvs_output = 2,
        },
-       .debugfs_name = "crtc1_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 1,
        .encoder_types = {
@@ -1112,10 +1112,10 @@ static const struct vc4_pv_data bcm2835_pv1_data = {
 
 static const struct vc4_pv_data bcm2835_pv2_data = {
        .base = {
+               .debugfs_name = "crtc2_regs",
                .hvs_available_channels = BIT(1),
                .hvs_output = 1,
        },
-       .debugfs_name = "crtc2_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 1,
        .encoder_types = {
@@ -1126,10 +1126,10 @@ static const struct vc4_pv_data bcm2835_pv2_data = {
 
 static const struct vc4_pv_data bcm2711_pv0_data = {
        .base = {
+               .debugfs_name = "crtc0_regs",
                .hvs_available_channels = BIT(0),
                .hvs_output = 0,
        },
-       .debugfs_name = "crtc0_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 1,
        .encoder_types = {
@@ -1140,10 +1140,10 @@ static const struct vc4_pv_data bcm2711_pv0_data = {
 
 static const struct vc4_pv_data bcm2711_pv1_data = {
        .base = {
+               .debugfs_name = "crtc1_regs",
                .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
                .hvs_output = 3,
        },
-       .debugfs_name = "crtc1_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 1,
        .encoder_types = {
@@ -1154,10 +1154,10 @@ static const struct vc4_pv_data bcm2711_pv1_data = {
 
 static const struct vc4_pv_data bcm2711_pv2_data = {
        .base = {
+               .debugfs_name = "crtc2_regs",
                .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
                .hvs_output = 4,
        },
-       .debugfs_name = "crtc2_regs",
        .fifo_depth = 256,
        .pixels_per_clock = 2,
        .encoder_types = {
@@ -1167,10 +1167,10 @@ static const struct vc4_pv_data bcm2711_pv2_data = {
 
 static const struct vc4_pv_data bcm2711_pv3_data = {
        .base = {
+               .debugfs_name = "crtc3_regs",
                .hvs_available_channels = BIT(1),
                .hvs_output = 1,
        },
-       .debugfs_name = "crtc3_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 1,
        .encoder_types = {
@@ -1180,10 +1180,10 @@ static const struct vc4_pv_data bcm2711_pv3_data = {
 
 static const struct vc4_pv_data bcm2711_pv4_data = {
        .base = {
+               .debugfs_name = "crtc4_regs",
                .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
                .hvs_output = 5,
        },
-       .debugfs_name = "crtc4_regs",
        .fifo_depth = 64,
        .pixels_per_clock = 2,
        .encoder_types = {
@@ -1320,7 +1320,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
 
        platform_set_drvdata(pdev, vc4_crtc);
 
-       vc4_debugfs_add_regset32(drm, pv_data->debugfs_name,
+       vc4_debugfs_add_regset32(drm, pv_data->base.debugfs_name,
                                 &vc4_crtc->regset);
 
        return 0;
index d935aa3e4409c090a068415a7534d02b2e89a0d4..443894e1715d31a7a657c24e54b662ae43bdc3fb 100644 (file)
@@ -459,6 +459,8 @@ to_vc4_encoder(struct drm_encoder *encoder)
 }
 
 struct vc4_crtc_data {
+       const char *debugfs_name;
+
        /* Bitmask of channels (FIFOs) of the HVS that the output can source from */
        unsigned int hvs_available_channels;
 
@@ -476,8 +478,6 @@ struct vc4_pv_data {
        u8 pixels_per_clock;
 
        enum vc4_encoder_type encoder_types[4];
-       const char *debugfs_name;
-
 };
 
 struct vc4_crtc {
index d20b0bc51a18632cd2f200a9530684f0bf95bf78..20e08e31aa1b6bef6d8e3ddd6c63de703cb762bf 100644 (file)
@@ -461,6 +461,7 @@ static irqreturn_t vc4_txp_interrupt(int irq, void *data)
 }
 
 static const struct vc4_crtc_data vc4_txp_crtc_data = {
+       .debugfs_name = "txp_regs",
        .hvs_available_channels = BIT(2),
        .hvs_output = 2,
 };