arm64: dts: ti: k3-j7200: Add support for multiple CAN instances

CAN instances 0 and 1 in the mcu domain are brought on the common
processor board through headers J30 and J31 respectively. Thus, add
their respective transceivers 1 and 2 dt nodes to add support for
these CAN instances.

CAN instance 3 in the main domain is brought on the common
processor board through header J27. The CAN High and Low lines
from the SoC are routed through a mux on the SoM. The select lines need
to be set for the CAN signals to get connected to the transceiver 3 on
the common processor board. Therefore, add transceiver dt nodes to add
support for this CAN instance.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20240130102044.120483-4-b-kapoor@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index ce2a5c9699de8633edec55c87c246d35ab840847..ce96361678f049040cb2dc7d7fed1c3169ce0d96 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -88,6 +88,34 @@
                states = <1800000 0x0>,
                         <3300000 0x1>;
        };
+
+       transceiver1: can-phy1 {
+               compatible = "ti,tcan1043";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
+               standby-gpios = <&wkup_gpio0 58 GPIO_ACTIVE_LOW>;
+               enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
+       };
+
+       transceiver2: can-phy2 {
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
+               standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
+       };
+
+       transceiver3: can-phy3 {
+               compatible = "ti,tcan1043";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>;
+               enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
+               mux-states = <&mux0 1>;
+       };
 };
 
 &wkup_pmx0 {
@@ -138,6 +166,33 @@
                        J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
                >;
        };
+
+       mcu_mcan0_pins_default: mcu-mcan0-default-pins {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x54, PIN_INPUT, 0) /* (A17) MCU_MCAN0_RX */
+                       J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (A16) MCU_MCAN0_TX */
+               >;
+       };
+
+       mcu_mcan1_pins_default: mcu-mcan1-default-pins {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x6c, PIN_INPUT, 0) /* (B16) WKUP_GPIO0_5.MCU_MCAN1_RX */
+                       J721E_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (D13) WKUP_GPIO0_4.MCU_MCAN1_TX */
+               >;
+       };
+
+       mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x58, PIN_INPUT, 7) /* (B18) WKUP_GPIO0_0 */
+                       J721E_WKUP_IOPAD(0x40, PIN_INPUT, 7) /* (B17) MCU_SPI0_D1 */
+               >;
+       };
+
+       mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x60, PIN_INPUT, 7) /* (D14) WKUP_GPIO0_2 */
+               >;
+       };
 };
 
 &main_pmx0 {
@@ -189,6 +244,13 @@
                        J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
                >;
        };
+
+       main_mcan3_pins_default: main-mcan3-default-pins {
+               pinctrl-single,pins = <
+                       J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
+                       J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
+               >;
+       };
 };
 
 &main_pmx1 {
@@ -388,3 +450,24 @@
        phy-names = "pcie-phy";
        num-lanes = <2>;
 };
+
+&mcu_mcan0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_mcan0_pins_default>;
+       phys = <&transceiver1>;
+};
+
+&mcu_mcan1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_mcan1_pins_default>;
+       phys = <&transceiver2>;
+};
+
+&main_mcan3 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_mcan3_pins_default>;
+       phys = <&transceiver3>;
+};