ARM: dts: exynos: Enable HDMI audio on Snow Chromebook

This patch adds new cpu, codec subnodes according to the updated
"google,snow-audio-max98095" DT bindings and the I2S clock tree
configuration so sound on the HDMI interface can also be supported.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
index bdf59dd3654b9b33090e2bec9ede2906f60628c6..fd9226d3b207e0175d1f431cbd47fe974f7f604e 100644 (file)
--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/maxim,max77686.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/sound/samsung-i2s.h>
 #include "exynos5250.dtsi"
 
 / {
@@ -523,6 +524,8 @@
 };
 
 &i2s0 {
+       assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
+       assigned-clock-parents = <&clock_audss EXYNOS_I2S_BUS>;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 16e37c337a3f60940143664ab791d271aae6127e..75fdc5e6d423de87d42dcbb6fdff6ab62d20d101 100644 (file)
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -18,6 +18,14 @@
 
                samsung,model = "Snow-I2S-MAX98095";
                samsung,audio-codec = <&max98095>;
+
+               cpu {
+                       sound-dai = <&i2s0 0>;
+               };
+
+               codec {
+                       sound-dai = <&max98095 0>, <&hdmi>;
+               };
        };
 };
 

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 93f45a71439b85caa993020c7a5a96a7b1c34b96..ebc79114b0ceeb17ea12472e5060ded6c3424e77 100644 (file)
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -498,6 +498,7 @@
                        pinctrl-names = "default";
                        pinctrl-0 = <&i2s0_bus>;
                        power-domains = <&pd_mau>;
+                       #clock-cells = <1>;
                };
 
                i2s1: i2s@12d60000 {