drm/i915/vlv: write the port field in the per-pipe DIP control reg
authorJesse Barnes <jbarnes@virtuousgeek.org>
Wed, 2 Apr 2014 17:08:51 +0000 (10:08 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 9 Apr 2014 12:46:49 +0000 (14:46 +0200)
In case we end up bouncing these around between ports.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_hdmi.c

index b0413e190625b26c0552e8a737479f52b3dd5c9d..ee892a4f90905fc4f2072fe08302d51b4a737046 100644 (file)
@@ -557,10 +557,12 @@ static void vlv_set_infoframes(struct drm_encoder *encoder,
                               struct drm_display_mode *adjusted_mode)
 {
        struct drm_i915_private *dev_priv = encoder->dev->dev_private;
+       struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
        struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
        u32 reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
        u32 val = I915_READ(reg);
+       u32 port = VIDEO_DIP_PORT(intel_dig_port->port);
 
        assert_hdmi_port_disabled(intel_hdmi);
 
@@ -576,6 +578,16 @@ static void vlv_set_infoframes(struct drm_encoder *encoder,
                return;
        }
 
+       if (port != (val & VIDEO_DIP_PORT_MASK)) {
+               if (val & VIDEO_DIP_ENABLE) {
+                       val &= ~VIDEO_DIP_ENABLE;
+                       I915_WRITE(reg, val);
+                       POSTING_READ(reg);
+               }
+               val &= ~VIDEO_DIP_PORT_MASK;
+               val |= port;
+       }
+
        val |= VIDEO_DIP_ENABLE;
        val &= ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT |
                 VIDEO_DIP_ENABLE_GCP);