ARM: tegra: Add interconnect properties to Tegra30 device-tree

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index aeae8c092d41f475890cafe590984498a04ba3bd..2caf6cc6f4b1e2a42822606433aec36652d8d295 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -210,6 +210,17 @@
 
                        nvidia,head = <0>;
 
+                       interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>,
+                                       <&mc TEGRA30_MC_DISPLAY0B &emc>,
+                                       <&mc TEGRA30_MC_DISPLAY1B &emc>,
+                                       <&mc TEGRA30_MC_DISPLAY0C &emc>,
+                                       <&mc TEGRA30_MC_DISPLAYHC &emc>;
+                       interconnect-names = "wina",
+                                            "winb",
+                                            "winb-vfilter",
+                                            "winc",
+                                            "cursor";
+
                        rgb {
                                status = "disabled";
                        };
@@ -229,6 +240,17 @@
 
                        nvidia,head = <1>;
 
+                       interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>,
+                                       <&mc TEGRA30_MC_DISPLAY0BB &emc>,
+                                       <&mc TEGRA30_MC_DISPLAY1BB &emc>,
+                                       <&mc TEGRA30_MC_DISPLAY0CB &emc>,
+                                       <&mc TEGRA30_MC_DISPLAYHCB &emc>;
+                       interconnect-names = "wina",
+                                            "winb",
+                                            "winb-vfilter",
+                                            "winc",
+                                            "cursor";
+
                        rgb {
                                status = "disabled";
                        };
@@ -748,15 +770,18 @@
 
                #iommu-cells = <1>;
                #reset-cells = <1>;
+               #interconnect-cells = <1>;
        };
 
-       memory-controller@7000f400 {
+       emc: memory-controller@7000f400 {
                compatible = "nvidia,tegra30-emc";
                reg = <0x7000f400 0x400>;
                interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA30_CLK_EMC>;
 
                nvidia,memory-controller = <&mc>;
+
+               #interconnect-cells = <0>;
        };
 
        fuse@7000f800 {