mt76: flush tx status queue on DMA reset
authorFelix Fietkau <nbd@nbd.name>
Tue, 13 Apr 2021 18:09:33 +0000 (20:09 +0200)
committerFelix Fietkau <nbd@nbd.name>
Wed, 21 Apr 2021 09:42:20 +0000 (11:42 +0200)
After DMA reset, tx status information for queued frames will never arrive.
Flush the queue to free skbs immediately instead of waiting for a timeout

Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/mt7603/mac.c
drivers/net/wireless/mediatek/mt76/mt7615/pci_mac.c
drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c
drivers/net/wireless/mediatek/mt76/mt7915/mac.c
drivers/net/wireless/mediatek/mt76/mt7921/mac.c

index e3a9dd6fbd87d74836a0cdff5f88f623ca5ec7e8..fbceb07c5f37883c4c9c71ec2bb0255ceba21210 100644 (file)
@@ -1445,6 +1445,8 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
                mt76_queue_rx_reset(dev, i);
        }
 
+       mt76_tx_status_check(&dev->mt76, NULL, true);
+
        mt7603_dma_sched_reset(dev);
 
        mt7603_mac_dma_start(dev);
index 9ac4bdabc0ef3a2bb7d9bf78ca1671e1ae78881e..8cd79e849045c5ec0c5b8955691b094ae30ceb8a 100644 (file)
@@ -201,6 +201,8 @@ void mt7615_dma_reset(struct mt7615_dev *dev)
        mt76_for_each_q_rx(&dev->mt76, i)
                mt76_queue_rx_reset(dev, i);
 
+       mt76_tx_status_check(&dev->mt76, NULL, true);
+
        mt7615_dma_start(dev);
 }
 EXPORT_SYMBOL_GPL(mt7615_dma_reset);
index fc12824ab74e4342be0e1dabf699cdb6a42db8be..ce1e9ad23fec354be1b5841eb763f4fb565bb613 100644 (file)
@@ -472,6 +472,8 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev)
                mt76_queue_rx_reset(dev, i);
        }
 
+       mt76_tx_status_check(&dev->mt76, NULL, true);
+
        mt76x02_mac_start(dev);
 
        if (dev->ed_monitor)
index 35ab4bf011eb1a2e4fc86aae625ff1cd29373ffb..6a4b57509751b89cad368e679ba3abfdcc84979c 100644 (file)
@@ -1564,6 +1564,8 @@ mt7915_dma_reset(struct mt7915_dev *dev)
        mt76_for_each_q_rx(&dev->mt76, i)
                mt76_queue_rx_reset(dev, i);
 
+       mt76_tx_status_check(&dev->mt76, NULL, true);
+
        /* re-init prefetch settings after reset */
        mt7915_dma_prefetch(dev);
 
index b507f391783020d5fcc9eea74ac01f17e23b4b29..572bab82315a9203e685324eaafbf9609eda2d63 100644 (file)
@@ -1254,6 +1254,8 @@ mt7921_dma_reset(struct mt7921_dev *dev)
        mt76_for_each_q_rx(&dev->mt76, i)
                mt76_queue_reset(dev, &dev->mt76.q_rx[i]);
 
+       mt76_tx_status_check(&dev->mt76, NULL, true);
+
        /* configure perfetch settings */
        mt7921_dma_prefetch(dev);