arm64: tegra: Add NVDEC on Tegra234

Add a device tree node for NVDEC on Tegra234.

Booting the firmware requires some information regarding offsets
within the firmware binary. These are passed through the device
tree, but since the values vary depending on the firmware version,
and the firmware itself is not available to the OS, the flasher is
expected to provide a device tree overlay with values corresponding
to the firmware it is flashing. The overlay then replaces the
placeholder values here.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index dcd0224a2a36925fc4214f80df0c5f8d718ee23b..35ce8cfb8c08143ccface9afd2eb7a56f297f521 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -603,6 +603,42 @@
                                iommus = <&smmu_niso1 TEGRA234_SID_VIC>;
                                dma-coherent;
                        };
+
+                       nvdec@15480000 {
+                               compatible = "nvidia,tegra234-nvdec";
+                               reg = <0x15480000 0x00040000>;
+                               clocks = <&bpmp TEGRA234_CLK_NVDEC>,
+                                        <&bpmp TEGRA234_CLK_FUSE>,
+                                        <&bpmp TEGRA234_CLK_TSEC_PKA>;
+                               clock-names = "nvdec", "fuse", "tsec_pka";
+                               resets = <&bpmp TEGRA234_RESET_NVDEC>;
+                               reset-names = "nvdec";
+                               power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;
+                               interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>,
+                                               <&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>;
+                               interconnect-names = "dma-mem", "write";
+                               iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>;
+                               dma-coherent;
+
+                               nvidia,memory-controller = <&mc>;
+
+                               /*
+                                * Placeholder values that firmware needs to update with the real
+                                * offsets parsed from the microcode headers.
+                                */
+                               nvidia,bl-manifest-offset = <0>;
+                               nvidia,bl-data-offset = <0>;
+                               nvidia,bl-code-offset = <0>;
+                               nvidia,os-manifest-offset = <0>;
+                               nvidia,os-data-offset = <0>;
+                               nvidia,os-code-offset = <0>;
+
+                               /*
+                                * Firmware needs to set this to "okay" once the above values have
+                                * been updated.
+                                */
+                               status = "disabled";
+                       };
                };
 
                gpio: gpio@2200000 {