arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp

i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index e910dc22bf43172d68fae1de3450b7e0ed66a0d8..2c207bc27d70868e3e968f35705e714d0ff5337e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1009,6 +1009,12 @@
                        interrupt-parent = <&gic>;
                };
 
+               edacmc: memory-controller@3d400000 {
+                       compatible = "snps,ddrc-3.80a";
+                       reg = <0x3d400000 0x400000>;
+                       interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                ddr-pmu@3d800000 {
                        compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu";
                        reg = <0x3d800000 0x400000>;