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net/mlx5: Introduce log_max_current_uc_list_wr_supported bit
author
Shay Drory
<shayd@nvidia.com>
Thu, 9 Dec 2021 10:09:23 +0000
(12:09 +0200)
committer
Saeed Mahameed
<saeedm@nvidia.com>
Wed, 15 Dec 2021 18:21:50 +0000
(10:21 -0800)
Downstream patch will use this bit in order to know whether the device
supports changing of max_uc_list.
Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
include/linux/mlx5/mlx5_ifc.h
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diff --git
a/include/linux/mlx5/mlx5_ifc.h
b/include/linux/mlx5/mlx5_ifc.h
index 3636df90899a2431ecbf0acd66789a851db5a164..d3899fc33fd76e77acc2ecca6cc035b132e5162c 100644
(file)
--- a/
include/linux/mlx5/mlx5_ifc.h
+++ b/
include/linux/mlx5/mlx5_ifc.h
@@
-1621,7
+1621,7
@@
struct mlx5_ifc_cmd_hca_cap_bits {
u8 ext_stride_num_range[0x1];
u8 roce_rw_supported[0x1];
- u8
reserved_at_3a2
[0x1];
+ u8
log_max_current_uc_list_wr_supported
[0x1];
u8 log_max_stride_sz_rq[0x5];
u8 reserved_at_3a8[0x3];
u8 log_min_stride_sz_rq[0x5];