drm/i915/dp: Don't roundup max bpp, while computing compressed bpp

While computing compressed bpp, maximum value of bits_per_pixel is
calculated that can be supported with the given link configuration
for a given mode. Avoid rounding up of this max bits_per_pixel.
Also improve documentation for computing max bits_per_pixel.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230223115509.3980226-1-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8e16745275f6777f2361145589ca7364b701f72c..da1c00ee92fbbc75538b72a5c5418f6c495aa7a7 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -722,9 +722,19 @@ u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
         * (LinkSymbolClock)* 8 * (TimeSlots / 64)
         * for SST -> TimeSlots is 64(i.e all TimeSlots that are available)
         * for MST -> TimeSlots has to be calculated, based on mode requirements
+        *
+        * Due to FEC overhead, the available bw is reduced to 97.2261%.
+        * To support the given mode:
+        * Bandwidth required should be <= Available link Bandwidth * FEC Overhead
+        * =>ModeClock * bits_per_pixel <= Available Link Bandwidth * FEC Overhead
+        * =>bits_per_pixel <= Available link Bandwidth * FEC Overhead / ModeClock
+        * =>bits_per_pixel <= (NumberOfLanes * LinkSymbolClock) * 8 (TimeSlots / 64) /
+        *                     (ModeClock / FEC Overhead)
+        * =>bits_per_pixel <= (NumberOfLanes * LinkSymbolClock * TimeSlots) /
+        *                     (ModeClock / FEC Overhead * 8)
         */
-       bits_per_pixel = DIV_ROUND_UP((link_clock * lane_count) * timeslots,
-                                     intel_dp_mode_to_fec_clock(mode_clock) * 8);
+       bits_per_pixel = ((link_clock * lane_count) * timeslots) /
+                        (intel_dp_mode_to_fec_clock(mode_clock) * 8);
 
        drm_dbg_kms(&i915->drm, "Max link bpp is %u for %u timeslots "
                                "total bw %u pixel clock %u\n",