drm/amdgpu: support for new SDMA front door load

Support for SDMA v6_0 ucode front door load.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index aa86f8ae424a64042dffed8693ffb9bcea8c2939..dfb778cd2f82f8a513c6942086bdb64f4e041466 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -2199,6 +2199,12 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode,
        case AMDGPU_UCODE_ID_DMCUB:
                *type = GFX_FW_TYPE_DMUB;
                break;
+       case AMDGPU_UCODE_ID_SDMA_UCODE_TH0:
+               *type = GFX_FW_TYPE_SDMA_UCODE_TH0;
+               break;
+       case AMDGPU_UCODE_ID_SDMA_UCODE_TH1:
+               *type = GFX_FW_TYPE_SDMA_UCODE_TH1;
+               break;
        case AMDGPU_UCODE_ID_MAXIMUM:
        default:
                return -EINVAL;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 4d3d14bcfb82f3ffb665093cba4522d40bfc3ac2..adf17bdddb65c0a5e8ccca27adf7da1ef2e2b5e3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -648,6 +648,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
        const struct dmcu_firmware_header_v1_0 *dmcu_hdr = NULL;
        const struct dmcub_firmware_header_v1_0 *dmcub_hdr = NULL;
        const struct mes_firmware_header_v1_0 *mes_hdr = NULL;
+       const struct sdma_firmware_header_v2_0 *sdma_hdr = NULL;
        u8 *ucode_addr;
 
        if (NULL == ucode->fw)
@@ -664,9 +665,20 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
        dmcu_hdr = (const struct dmcu_firmware_header_v1_0 *)ucode->fw->data;
        dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data;
        mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data;
+       sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data;
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
                switch (ucode->ucode_id) {
+               case AMDGPU_UCODE_ID_SDMA_UCODE_TH0:
+                       ucode->ucode_size = le32_to_cpu(sdma_hdr->ctx_jt_offset + sdma_hdr->ctx_jt_size);
+                       ucode_addr = (u8 *)ucode->fw->data +
+                               le32_to_cpu(sdma_hdr->header.ucode_array_offset_bytes);
+                       break;
+               case AMDGPU_UCODE_ID_SDMA_UCODE_TH1:
+                       ucode->ucode_size = le32_to_cpu(sdma_hdr->ctl_jt_offset + sdma_hdr->ctl_jt_size);
+                       ucode_addr = (u8 *)ucode->fw->data +
+                               le32_to_cpu(sdma_hdr->ctl_ucode_offset);
+                       break;
                case AMDGPU_UCODE_ID_CP_MEC1:
                case AMDGPU_UCODE_ID_CP_MEC2:
                        ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) -