drm/i915/dsb: Allow DSB based commits when scalers are in use
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 18 Feb 2025 20:58:49 +0000 (22:58 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 27 Feb 2025 20:44:59 +0000 (22:44 +0200)
Have DSB perform plane scaler programming as well. Changes
to pfit/pipe scaler are not being done on the dsb since those
take the fastset path. However we do now allow DSB based plane
updates when the pfit/pipe scaler is currently enabled (the
pfit/pipe scaler just won't be touched by the DSB).

Fortunately the hardware issue where some scaler registers
are latched at frame start and some at start of vblank has
been fixed on icl+ (IIRC), and since DSB is tgl+ only we
don't have to do any changes to the DSB vblank evasion.
Not that we handle that hardware issue correctly in the
CPU vblank evasion either...

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250218205850.1422-4-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shakar@intel.com>
drivers/gpu/drm/i915/display/intel_display.c

index 2a5acf45ff419dc98fc15b6eb8eedc2ec13fbad1..f0fbe18d2f7e0c9b3d5bef7b03c7ba6d49e24133 100644 (file)
@@ -7162,8 +7162,6 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state,
                                     struct intel_crtc *crtc)
 {
        struct intel_display *display = to_intel_display(state);
-       const struct intel_crtc_state *old_crtc_state =
-               intel_atomic_get_old_crtc_state(state, crtc);
        struct intel_crtc_state *new_crtc_state =
                intel_atomic_get_new_crtc_state(state, crtc);
 
@@ -7177,8 +7175,6 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state,
        new_crtc_state->use_dsb =
                !new_crtc_state->do_async_flip &&
                (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) &&
-               !new_crtc_state->scaler_state.scaler_users &&
-               !old_crtc_state->scaler_state.scaler_users &&
                !intel_crtc_needs_modeset(new_crtc_state) &&
                !intel_crtc_needs_fastset(new_crtc_state);
 
@@ -7188,6 +7184,7 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state,
 static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
                                    struct intel_crtc *crtc)
 {
+       struct intel_display *display = to_intel_display(state);
        struct intel_crtc_state *new_crtc_state =
                intel_atomic_get_new_crtc_state(state, crtc);
 
@@ -7234,6 +7231,10 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
                intel_crtc_planes_update_arm(new_crtc_state->dsb_commit,
                                             state, crtc);
 
+               if (DISPLAY_VER(display) >= 9)
+                       skl_detach_scalers(new_crtc_state->dsb_commit,
+                                          new_crtc_state);
+
                if (!new_crtc_state->dsb_color_vblank) {
                        intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);