soundwire: amd: handle SoundWire wake enable interrupt
authorVijendar Mukunda <Vijendar.Mukunda@amd.com>
Tue, 21 Mar 2023 05:09:00 +0000 (10:39 +0530)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Apr 2023 10:00:36 +0000 (15:30 +0530)
Add wake enable interrupt support for both the SoundWire manager
instances.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Signed-off-by: Mastan Katragadda <Mastan.Katragadda@amd.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/lkml/20230227154801.50319-8-Vijendar.Mukunda@amd.com
Link: https://lore.kernel.org/r/20230321050901.115439-8-Vijendar.Mukunda@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/soundwire/amd_manager.c
drivers/soundwire/amd_manager.h

index 6172b3cb84d4d5f46a2cebe781b99a98c2880b95..d55706e87d83c45931a8c9338f7890754d155e0f 100644 (file)
@@ -831,6 +831,13 @@ static void amd_sdw_update_slave_status(u32 status_change_0to7, u32 status_chang
        }
 }
 
+static void amd_sdw_process_wake_event(struct amd_sdw_manager *amd_manager)
+{
+       pm_request_resume(amd_manager->dev);
+       writel(0x00, amd_manager->acp_mmio + ACP_SW_WAKE_EN(amd_manager->instance));
+       writel(0x00, amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_8TO11);
+}
+
 static void amd_sdw_irq_thread(struct work_struct *work)
 {
        struct amd_sdw_manager *amd_manager =
@@ -842,6 +849,9 @@ static void amd_sdw_irq_thread(struct work_struct *work)
        status_change_0to7 = readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_0TO7);
        dev_dbg(amd_manager->dev, "[SDW%d] SDW INT: 0to7=0x%x, 8to11=0x%x\n",
                amd_manager->instance, status_change_0to7, status_change_8to11);
+       if (status_change_8to11 & AMD_SDW_WAKE_STAT_MASK)
+               return amd_sdw_process_wake_event(amd_manager);
+
        if (status_change_8to11 & AMD_SDW_PREQ_INTR_STAT) {
                amd_sdw_read_and_process_ping_status(amd_manager);
        } else {
index b101f45362309a7a6fca657fa3a1a8a2061c01c1..5f040151a259b8f7eb771981013680d2a8078352 100644 (file)
 #define AMD_SDW_CLK_STOP_DONE                          1
 #define AMD_SDW_CLK_RESUME_REQ                         2
 #define AMD_SDW_CLK_RESUME_DONE                                3
+#define AMD_SDW_WAKE_STAT_MASK                         BIT(16)
 
 static u32 amd_sdw_freq_tbl[AMD_SDW_MAX_FREQ_NUM] = {
        AMD_SDW_DEFAULT_CLK_FREQ,