ARM: dts: meson: fix PHY deassert timing requirements

According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.

Fixes: a2c6e82e5341 ("ARM: dts: meson: switch to the generic Ethernet PHY reset bindings")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> # on Odroid-C1+
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/ff78772b306411e145769c46d4090554344db41e.1607363522.git.stefan@agner.ch

diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 0c26467de4d0378a1eae4516eaf2bf3e99592179..5963566dbcc9d53dde416418401acc74e52c2550 100644 (file)
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -224,7 +224,7 @@
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;

diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
index cc498191ddd1df41ba3531ae11c83628883f7812..8f4eb1ed4581633bedb3c17885a12102449dd43e 100644 (file)
--- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
@@ -81,7 +81,7 @@
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
                };
        };