net/mlx5: mlx5_ifc update for multi-plane support
authorMark Zhang <markzhang@nvidia.com>
Sun, 16 Jun 2024 16:08:34 +0000 (19:08 +0300)
committerLeon Romanovsky <leonro@nvidia.com>
Mon, 1 Jul 2024 12:10:15 +0000 (15:10 +0300)
Add new fields to support mlx5 multi-plane feature. Actual support will
be added in following patches.

Signed-off-by: Mark Zhang <markzhang@nvidia.com>
Link: https://lore.kernel.org/r/36a74a1b1d2b7b59c99cda4abad1794ddde30230.1718553901.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
include/linux/mlx5/mlx5_ifc.h

index 09d9d87d62c6cb059146d752c734402fc583ba98..61738990e399b176e3a276d3b0edc38a0e7a5c29 100644 (file)
@@ -793,7 +793,7 @@ struct mlx5_ifc_ads_bits {
        u8         reserved_at_2[0xe];
        u8         pkey_index[0x10];
 
-       u8         reserved_at_20[0x8];
+       u8         plane_index[0x8];
        u8         grh[0x1];
        u8         mlid[0x7];
        u8         rlid[0x10];
@@ -1990,7 +1990,8 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
        u8         reserved_at_c0[0x8];
        u8         migration_multi_load[0x1];
        u8         migration_tracking_state[0x1];
-       u8         reserved_at_ca[0x6];
+       u8         multiplane_qp_ud[0x1];
+       u8         reserved_at_cb[0x5];
        u8         migration_in_chunks[0x1];
        u8         reserved_at_d1[0xf];
 
@@ -4172,7 +4173,8 @@ struct mlx5_ifc_hca_vport_context_bits {
        u8         has_smi[0x1];
        u8         has_raw[0x1];
        u8         grh_required[0x1];
-       u8         reserved_at_104[0xc];
+       u8         reserved_at_104[0x4];
+       u8         num_port_plane[0x8];
        u8         port_physical_state[0x4];
        u8         vport_state_policy[0x4];
        u8         port_state[0x4];
@@ -7692,7 +7694,7 @@ struct mlx5_ifc_mad_ifc_in_bits {
        u8         op_mod[0x10];
 
        u8         remote_lid[0x10];
-       u8         reserved_at_50[0x8];
+       u8         plane_index[0x8];
        u8         port[0x8];
 
        u8         reserved_at_60[0x20];
@@ -9621,7 +9623,9 @@ struct mlx5_ifc_ptys_reg_bits {
        u8         an_disable_cap[0x1];
        u8         reserved_at_3[0x5];
        u8         local_port[0x8];
-       u8         reserved_at_10[0xd];
+       u8         reserved_at_10[0x8];
+       u8         plane_ind[0x4];
+       u8         reserved_at_1c[0x1];
        u8         proto_mask[0x3];
 
        u8         an_status[0x4];