Blackfin arch: add NFC driver support in BF527-EZKIT board
authorMichael Hennerich <michael.hennerich@analog.com>
Mon, 29 Oct 2007 08:55:18 +0000 (16:55 +0800)
committerBryan Wu <bryan.wu@analog.com>
Mon, 29 Oct 2007 08:55:18 +0000 (16:55 +0800)
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
arch/blackfin/mach-bf527/boards/ezkit.c
include/asm-blackfin/mach-bf527/dma.h
include/asm-blackfin/mach-bf548/portmux.h

index 3e884f3a8182ff1f4e02ef6847627ed7831b9bf1..bf1bedcc886886894162e48ffdf6c083ff9348c5 100644 (file)
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/usb_sl811.h>
+#include <asm/cplb.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
+#include <asm/nand.h>
 #include <linux/spi/ad7877.h>
 
 /*
@@ -102,6 +104,53 @@ void __exit bfin_isp1761_exit(void)
 arch_initcall(bfin_isp1761_init);
 #endif
 
+#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
+static struct mtd_partition partition_info[] = {
+       {
+               .name = "Linux Kernel",
+               .offset = 0,
+               .size = 4 * SIZE_1M,
+       },
+       {
+               .name = "File System",
+               .offset = 4 * SIZE_1M,
+               .size = (256 - 4) * SIZE_1M,
+       },
+};
+
+static struct bf5xx_nand_platform bf5xx_nand_platform = {
+       .page_size = NFC_PG_SIZE_256,
+       .data_width = NFC_NWIDTH_8,
+       .partitions = partition_info,
+       .nr_partitions = ARRAY_SIZE(partition_info),
+       .rd_dly = 3,
+       .wr_dly = 3,
+};
+
+static struct resource bf5xx_nand_resources[] = {
+       {
+               .start = NFC_CTL,
+               .end = NFC_DATA_RD + 2,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = CH_NFC,
+               .end = CH_NFC,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device bf5xx_nand_device = {
+       .name = "bf5xx-nand",
+       .id = 0,
+       .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
+       .resource = bf5xx_nand_resources,
+       .dev = {
+               .platform_data = &bf5xx_nand_platform,
+       },
+};
+#endif
+
 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 static struct resource bfin_pcmcia_cf_resources[] = {
        {
@@ -650,6 +699,10 @@ static struct platform_device bfin_pata_device = {
 #endif
 
 static struct platform_device *stamp_devices[] __initdata = {
+#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
+       &bf5xx_nand_device,
+#endif
+
 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
        &bfin_pcmcia_cf_device,
 #endif
index a41627ae9134f30e652ae4c56555c42cf15c0dc6..2dfee12864f684010e99496942cca94858ff3f42 100644 (file)
@@ -35,7 +35,6 @@
 #define MAX_BLACKFIN_DMA_CHANNEL 16
 
 #define CH_PPI                         0       /* PPI receive/transmit or NFC */
-#define CH_NFC                 0       /* PPI receive/transmit or NFC */
 #define CH_EMAC_RX             1       /* Ethernet MAC receive or HOSTDP */
 #define CH_EMAC_HOSTDP                 1       /* Ethernet MAC receive or HOSTDP */
 #define CH_EMAC_TX             2       /* Ethernet MAC transmit or NFC */
 #define CH_MEM_STREAM1_DEST    14      /* TX */
 #define CH_MEM_STREAM1_SRC     15      /* RX */
 
+#if defined(CONFIG_BF527_NAND_D_PORTF)
+#define CH_NFC                 CH_PPI  /* PPI receive/transmit or NFC */
+#elif defined(CONFIG_BF527_NAND_D_PORTH)
+#define CH_NFC                 CH_EMAC_TX /* PPI receive/transmit or NFC */
+#endif
+
 extern int channel2irq(unsigned int channel);
 extern struct dma_register *base_addr[];
 
index b382deb501a79137d99b893ece54923ea53b2f2b..6b485120015f85a4b6243aad03f5446444a218ea 100644 (file)
 #define P_AMC_BG       (P_DEFINED | P_IDENT(GPIO_PJ12) | P_FUNCT(0))
 #define P_AMC_BGH      (P_DEFINED | P_IDENT(GPIO_PJ13) | P_FUNCT(0))
 
+
+#define P_NAND_D0      (P_DONTCARE)
+#define P_NAND_D1      (P_DONTCARE)
+#define P_NAND_D2      (P_DONTCARE)
+#define P_NAND_D3      (P_DONTCARE)
+#define P_NAND_D4      (P_DONTCARE)
+#define P_NAND_D5      (P_DONTCARE)
+#define P_NAND_D6      (P_DONTCARE)
+#define P_NAND_D7      (P_DONTCARE)
+#define P_NAND_WE      (P_DONTCARE)
+#define P_NAND_RE      (P_DONTCARE)
+#define P_NAND_CLE     (P_DONTCARE)
+#define P_NAND_ALE     (P_DONTCARE)
+
 #endif /* _MACH_PORTMUX_H_ */