OMAP: DSS2: fix get_dsi/dispc_clk_source() usage

After changing the selection of DSI and DISPC clock source the users of
get_dsi/dispc_clk_source() functions were left unchanged.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 7781c65bbeba670d676422f1f2c3e607a8f3b2b7..212cb800a5d2a0315fd34e63b8de166b9acac43a 100644 (file)
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2198,7 +2198,7 @@ unsigned long dispc_fclk_rate(void)
 {
        unsigned long r = 0;
 
-       if (dss_get_dispc_clk_source() == 0)
+       if (dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK)
                r = dss_clk_get_rate(DSS_CLK_FCK1);
        else
 #ifdef CONFIG_OMAP2_DSS_DSI
@@ -2251,7 +2251,7 @@ void dispc_dump_clocks(struct seq_file *s)
        seq_printf(s, "- DISPC -\n");
 
        seq_printf(s, "dispc fclk source = %s\n",
-                       dss_get_dispc_clk_source() == 0 ?
+                       dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
                        "dss1_alwon_fclk" : "dsi1_pll_fclk");
 
        seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate());

diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 4b85ed202d50f5665ec405593e47d3034fd33a98..928b5e44a3dd686d706983dc50434f7ed5053791 100644 (file)
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -778,7 +778,7 @@ static unsigned long dsi_fclk_rate(void)
 {
        unsigned long r;
 
-       if (dss_get_dsi_clk_source() == 0) {
+       if (dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) {
                /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */
                r = dss_clk_get_rate(DSS_CLK_FCK1);
        } else {
@@ -1231,17 +1231,19 @@ void dsi_dump_clocks(struct seq_file *s)
        seq_printf(s,   "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n",
                        cinfo->dsi1_pll_fclk,
                        cinfo->regm3,
-                       dss_get_dispc_clk_source() == 0 ? "off" : "on");
+                       dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
+                       "off" : "on");
 
        seq_printf(s,   "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n",
                        cinfo->dsi2_pll_fclk,
                        cinfo->regm4,
-                       dss_get_dsi_clk_source() == 0 ? "off" : "on");
+                       dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
+                       "off" : "on");
 
        seq_printf(s,   "- DSI -\n");
 
        seq_printf(s,   "dsi fclk source = %s\n",
-                       dss_get_dsi_clk_source() == 0 ?
+                       dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ?
                        "dss1_alwon_fclk" : "dsi2_pll_fclk");
 
        seq_printf(s,   "DSI_FCLK\t%lu\n", dsi_fclk_rate());