drm/i915: Update pipe gamma enable bits when C8 planes are getting enabled/disabled
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 13 May 2019 13:39:03 +0000 (16:39 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 28 May 2019 17:46:55 +0000 (20:46 +0300)
When the first C8 plane gets enabled, or the last one gets disabled we
may need to enable/disable the pipe gamma for the other active planes.
Check for that and run through the normal intel_color_check() path.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190513133904.20374-2-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/intel_display.c

index 0e3abc7f65e3edbe352753fd3a45c68ed4e8a45f..4cbea30439ba56c0656b795f2df8fe04a98dc1cc 100644 (file)
@@ -11507,6 +11507,17 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
        return 0;
 }
 
+static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state)
+{
+       struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
+       struct intel_atomic_state *state =
+               to_intel_atomic_state(new_crtc_state->base.state);
+       const struct intel_crtc_state *old_crtc_state =
+               intel_atomic_get_old_crtc_state(state, crtc);
+
+       return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
+}
+
 static int intel_crtc_atomic_check(struct drm_crtc *crtc,
                                   struct drm_crtc_state *crtc_state)
 {
@@ -11530,6 +11541,13 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
                        return ret;
        }
 
+       /*
+        * May need to update pipe gamma enable bits
+        * when C8 planes are getting enabled/disabled.
+        */
+       if (c8_planes_changed(pipe_config))
+               crtc_state->color_mgmt_changed = true;
+
        if (mode_changed || pipe_config->update_pipe ||
            crtc_state->color_mgmt_changed) {
                ret = intel_color_check(pipe_config);