drm/amdgpu: fix colliding of preemption

what:
some os preemption path is messed up with world switch preemption

fix:
cleanup those logics so os preemption not mixed with world switch

this patch is a general fix for issues comes from SRIOV MCBP, but
there is still UMD side issues not resovlved yet, so this patch
cannot fix all world switch bug.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index a2ee30b16212811648f52e818e26af77f748d14f..7854c053e85dc36e81657381c5672f0b43af397d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -70,7 +70,8 @@ uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,
        uint32_t index = 0;
        int r;
 
-       if (vmid == 0 || !amdgpu_mcbp)
+       /* don't enable OS preemption on SDMA under SRIOV */
+       if (amdgpu_sriov_vf(adev) || vmid == 0 || !amdgpu_mcbp)
                return 0;
 
        r = amdgpu_sdma_get_index_from_ring(ring, &index);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 22bbb36c768e2bbe5b49f4c0187368d223717559..bb2f990ee070d1d650c179b52f119ac01ac28200 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4413,7 +4413,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 
        control |= ib->length_dw | (vmid << 24);
 
-       if (amdgpu_mcbp && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
+       if ((amdgpu_sriov_vf(ring->adev) || amdgpu_mcbp) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
                control |= INDIRECT_BUFFER_PRE_ENB(1);
 
                if (flags & AMDGPU_IB_PREEMPTED)
@@ -4421,7 +4421,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 
                if (!(ib->flags & AMDGPU_IB_FLAG_CE))
                        gfx_v10_0_ring_emit_de_meta(ring,
-                                   flags & AMDGPU_IB_PREEMPTED ? true : false);
+                                   (!amdgpu_sriov_vf(ring->adev) && flags & AMDGPU_IB_PREEMPTED) ? true : false);
        }
 
        amdgpu_ring_write(ring, header);
@@ -4568,9 +4568,9 @@ static void gfx_v10_0_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flag
 {
        uint32_t dw2 = 0;
 
-       if (amdgpu_mcbp)
+       if (amdgpu_mcbp || amdgpu_sriov_vf(ring->adev))
                gfx_v10_0_ring_emit_ce_meta(ring,
-                                   flags & AMDGPU_IB_PREEMPTED ? true : false);
+                                   (!amdgpu_sriov_vf(ring->adev) && flags & AMDGPU_IB_PREEMPTED) ? true : false);
 
        gfx_v10_0_ring_emit_tmz(ring, true);