drm/tegra: Use tegra_commit_dc() in output drivers
authorThierry Reding <treding@nvidia.com>
Fri, 21 Nov 2014 16:33:33 +0000 (17:33 +0100)
committerThierry Reding <treding@nvidia.com>
Tue, 27 Jan 2015 09:14:43 +0000 (10:14 +0100)
All output drivers have open-coded variants of this function, so export
it to remove some code duplication.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/dc.c
drivers/gpu/drm/tegra/drm.h
drivers/gpu/drm/tegra/dsi.c
drivers/gpu/drm/tegra/hdmi.c
drivers/gpu/drm/tegra/rgb.c
drivers/gpu/drm/tegra/sor.c

index aca886e03b28f48b81c4eb1ae50fe4e257db7e04..dab7ea261e74d423e3ae8c4502d1aa2b487e9ffe 100644 (file)
@@ -65,7 +65,7 @@ static void tegra_dc_cursor_commit(struct tegra_dc *dc)
  * into the ACTIVE copy, either immediately if the display controller is in
  * STOP mode, or at the next frame boundary otherwise.
  */
-static void tegra_dc_commit(struct tegra_dc *dc)
+void tegra_dc_commit(struct tegra_dc *dc)
 {
        tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
        tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
index 3a3b2e7b5b3f0f7902e03a32cdcaba65f20c8cdf..5a0e96debcb1f6ad207e0b9a324d181f8d02e628 100644 (file)
@@ -177,6 +177,7 @@ struct tegra_dc_window {
 void tegra_dc_enable_vblank(struct tegra_dc *dc);
 void tegra_dc_disable_vblank(struct tegra_dc *dc);
 void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
+void tegra_dc_commit(struct tegra_dc *dc);
 
 struct tegra_output_ops {
        int (*enable)(struct tegra_output *output);
index 748727bc175b18c0af4f6ba4183baa85a0baa1bd..0ca8ca3775fd6ffa300d45c6f627960f1e92f297 100644 (file)
@@ -658,8 +658,7 @@ static int tegra_output_dsi_enable(struct tegra_output *output)
                 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;
        tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
 
-       tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-       tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+       tegra_dc_commit(dc);
 
        /* enable DSI controller */
        tegra_dsi_enable(dsi);
@@ -778,8 +777,7 @@ static int tegra_output_dsi_disable(struct tegra_output *output)
                value &= ~DSI_ENABLE;
                tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
 
-               tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-               tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+               tegra_dc_commit(dc);
        }
 
        err = tegra_dsi_wait_idle(dsi, 100);
index 0f122eae7c645ce7791602ac6e339794da514a17..f118b914293e4bd35f7e40fe781004370b8bf000 100644 (file)
@@ -997,8 +997,7 @@ static int tegra_output_hdmi_enable(struct tegra_output *output)
                 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;
        tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
 
-       tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-       tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+       tegra_dc_commit(dc);
 
        /* TODO: add HDCP support */
 
@@ -1042,8 +1041,7 @@ static int tegra_output_hdmi_disable(struct tegra_output *output)
                value &= ~HDMI_ENABLE;
                tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
 
-               tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-               tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+               tegra_dc_commit(dc);
        }
 
        clk_disable_unprepare(hdmi->clk);
index d6af9be48f42ff1a536bf0c24dc4616839f95f1e..3b851abbccaebc50cde152dc1b36eba2a3ff3d69 100644 (file)
@@ -123,8 +123,7 @@ static int tegra_output_rgb_enable(struct tegra_output *output)
                 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;
        tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
 
-       tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-       tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+       tegra_dc_commit(rgb->dc);
 
        rgb->enabled = true;
 
@@ -148,11 +147,10 @@ static int tegra_output_rgb_disable(struct tegra_output *output)
        value &= ~DISP_CTRL_MODE_MASK;
        tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_COMMAND);
 
-       tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-       tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
-
        tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));
 
+       tegra_dc_commit(rgb->dc);
+
        rgb->enabled = false;
 
        return 0;
index 7829e81f065d17e54ee52634886d9da0b921621a..6a341822abe9bd043ef6a712eb5855eb476389c3 100644 (file)
@@ -267,8 +267,7 @@ static int tegra_sor_wakeup(struct tegra_sor *sor)
                 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE;
        tegra_dc_writel(dc, value, DC_CMD_DISPLAY_POWER_CONTROL);
 
-       tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-       tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+       tegra_dc_commit(dc);
 
        timeout = jiffies + msecs_to_jiffies(250);
 
@@ -1080,8 +1079,7 @@ static int tegra_output_sor_disable(struct tegra_output *output)
                value &= ~SOR_ENABLE;
                tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
 
-               tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-               tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+               tegra_dc_commit(dc);
        }
 
        err = tegra_sor_power_down(sor);