arm64: dts: imx8dxl: add flexspi0 support
authorFrank Li <Frank.Li@nxp.com>
Fri, 11 Nov 2022 15:47:39 +0000 (10:47 -0500)
committerShawn Guo <shawnguo@kernel.org>
Mon, 14 Nov 2022 08:48:38 +0000 (16:48 +0800)
Add flexspi0 node at common lsio subsystem.
Change flexspi0 irq number for imx8dxl.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi

index 6446e6df7a9ac2fb0272a9a67a6e90fdcd88330e..1f3d225e64ece966390d4bdc967f538034a4d977 100644 (file)
@@ -11,7 +11,8 @@ lsio_subsys: bus@5d000000 {
        compatible = "simple-bus";
        #address-cells = <1>;
        #size-cells = <1>;
-       ranges = <0x5d000000 0x0 0x5d000000 0x1000000>;
+       ranges = <0x5d000000 0x0 0x5d000000 0x1000000>,
+                <0x08000000 0x0 0x08000000 0x10000000>;
 
        lsio_mem_clk: clock-lsio-mem {
                compatible = "fixed-clock";
@@ -107,6 +108,20 @@ lsio_subsys: bus@5d000000 {
                power-domains = <&pd IMX_SC_R_GPIO_7>;
        };
 
+       flexspi0: spi@5d120000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nxp,imx8qxp-fspi";
+               reg = <0x5d120000 0x10000>, <0x08000000 0x10000000>;
+               reg-names = "fspi_base", "fspi_mmap";
+               interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>,
+                        <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>;
+               clock-names = "fspi", "fspi_en";
+               power-domains = <&pd IMX_SC_R_FSPI_0>;
+               status = "disabled";
+       };
+
        lsio_mu0: mailbox@5d1b0000 {
                reg = <0x5d1b0000 0x10000>;
                interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
index 815bd987b09b26d41131fecff40e0bd96df410b8..85e6131ec4066030c3555cce7922d4bdaa5efc41 100644 (file)
@@ -3,6 +3,11 @@
  * Copyright 2019~2020, 2022 NXP
  */
 
+&flexspi0 {
+       compatible = "nxp,imx8dxl-fspi";
+       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+};
+
 &lsio_gpio0 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;