drm/amdgpu: fix value of some UMC parameters for UMC v12
authorTao Zhou <tao.zhou1@amd.com>
Tue, 19 Sep 2023 07:57:00 +0000 (15:57 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2023 20:54:52 +0000 (16:54 -0400)
Prepare for bad page retirement.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

index 0f82ab48887ae916c2d1a64c32a51441326b07d2..f7d0545598bdc18ba3e0f2dbdc492efad3f0db6d 100644 (file)
@@ -1507,12 +1507,14 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
                        adev->umc.channel_idx_tbl = &umc_v6_7_channel_idx_tbl_second[0][0];
                break;
        case IP_VERSION(12, 0, 0):
-               adev->umc.max_ras_err_cnt_per_query = UMC_V12_0_TOTAL_CHANNEL_NUM(adev);
+               adev->umc.max_ras_err_cnt_per_query =
+                       UMC_V12_0_TOTAL_CHANNEL_NUM(adev) * UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL;
                adev->umc.channel_inst_num = UMC_V12_0_CHANNEL_INSTANCE_NUM;
                adev->umc.umc_inst_num = UMC_V12_0_UMC_INSTANCE_NUM;
                adev->umc.node_inst_num /= UMC_V12_0_UMC_INSTANCE_NUM;
                adev->umc.channel_offs = UMC_V12_0_PER_CHANNEL_OFFSET;
                adev->umc.active_mask = adev->aid_mask;
+               adev->umc.retire_unit = UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL;
                adev->umc.channel_idx_tbl = &umc_v12_0_channel_idx_tbl[0][0][0];
                if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu)
                        adev->umc.ras = &umc_v12_0_ras;
index e3619d67ae3b7026ab260c2811394431a0ceb30b..4885b9fff2721753126cdf3aa1a576f9d587ba2e 100644 (file)
@@ -53,6 +53,8 @@
 
 /* one piece of normalized address is mapped to 8 pieces of physical address */
 #define UMC_V12_0_NA_MAP_PA_NUM        8
+/* R13 bit shift should be considered, double the number */
+#define UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL (UMC_V12_0_NA_MAP_PA_NUM * 2)
 /* bank bits in MCA error address */
 #define UMC_V12_0_MCA_B0_BIT 6
 #define UMC_V12_0_MCA_B1_BIT 7