ARM: dts: ls1021a: disable ifc node by default
authorLi Yang <leoyang.li@nxp.com>
Tue, 12 Oct 2021 23:58:15 +0000 (18:58 -0500)
committerShawn Guo <shawnguo@kernel.org>
Fri, 15 Oct 2021 03:16:36 +0000 (11:16 +0800)
Disable the bus in the SoC dtsi file to be enabled only in board dts
files. Also breakup long values in the ifc node to fix dtbs_check.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/ls1021a-qds.dts
arch/arm/boot/dts/ls1021a.dtsi

index 8982ba2c14c23f0f5a505cd0a87f624843d20af0..6db6604e7a187a0f48342536f847fdd42b6ec65c 100644 (file)
        #address-cells = <2>;
        #size-cells = <1>;
        /* NOR, NAND Flashes and FPGA on board */
-       ranges = <0x0 0x0 0x0 0x60000000 0x08000000
-                 0x2 0x0 0x0 0x7e800000 0x00010000
-                 0x3 0x0 0x0 0x7fb00000 0x00000100>;
+       ranges = <0x0 0x0 0x0 0x60000000 0x08000000>,
+                <0x2 0x0 0x0 0x7e800000 0x00010000>,
+                <0x3 0x0 0x0 0x7fb00000 0x00000100>;
        status = "okay";
 
        nor@0,0 {
index 4a7d06a149465e2e353e3b4e7f5a8830f59fa599..e6677721263bf046624279f2ebfa1bf87768bd07 100644 (file)
                        compatible = "fsl,ifc", "simple-bus";
                        reg = <0x0 0x1530000 0x0 0x10000>;
                        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
                };
 
                dcfg: dcfg@1ee0000 {