arm64: dts: imx8: Fix lpuart DMA channel order

Bindings say DMA channels are in order Rx, Tx. Adjust the DT nodes
accordingly. While at it, use defines for the flags.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index a180893ac81e071a6f3b6672d13e8cf5363d2ec6..cab3468b1875ee885f32a842f92d56cc0b744998 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <dt-bindings/clock/imx8-lpcg.h>
+#include <dt-bindings/dma/fsl-edma.h>
 #include <dt-bindings/firmware/imx/rsrc.h>
 
 dma_ipg_clk: clock-dma-ipg {
@@ -93,8 +94,8 @@ dma_subsys: bus@5a000000 {
                assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <80000000>;
                power-domains = <&pd IMX_SC_R_UART_0>;
-               dma-names = "tx","rx";
-               dmas = <&edma2 9 0 0>, <&edma2 8 0 1>;
+               dma-names = "rx", "tx";
+               dmas = <&edma2 8 0 FSL_EDMA_RX>, <&edma2 9 0 0>;
                status = "disabled";
        };
 
@@ -107,8 +108,8 @@ dma_subsys: bus@5a000000 {
                assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <80000000>;
                power-domains = <&pd IMX_SC_R_UART_1>;
-               dma-names = "tx","rx";
-               dmas = <&edma2 11 0 0>, <&edma2 10 0 1>;
+               dma-names = "rx", "tx";
+               dmas = <&edma2 10 0 FSL_EDMA_RX>, <&edma2 11 0 0>;
                status = "disabled";
        };
 
@@ -121,8 +122,8 @@ dma_subsys: bus@5a000000 {
                assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <80000000>;
                power-domains = <&pd IMX_SC_R_UART_2>;
-               dma-names = "tx","rx";
-               dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
+               dma-names = "rx", "tx";
+               dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
                status = "disabled";
        };
 
@@ -135,8 +136,8 @@ dma_subsys: bus@5a000000 {
                assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <80000000>;
                power-domains = <&pd IMX_SC_R_UART_3>;
-               dma-names = "tx","rx";
-               dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
+               dma-names = "rx", "tx";
+               dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
                status = "disabled";
        };