pinctrl: meson: fix pull enable register calculation
authorJerome Brunet <jbrunet@baylibre.com>
Tue, 13 Nov 2018 10:55:36 +0000 (11:55 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 19 Nov 2018 14:40:55 +0000 (15:40 +0100)
We just changed the code so we apply bias disable on the correct
register but forgot to align the register calculation. The result
is that we apply the change on the correct register, but possibly
at the incorrect offset/bit

This went undetected because offsets tends to be the same between
REG_PULL and REG_PULLEN for a given pin the EE controller. This
is not true for the AO controller.

Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/meson/pinctrl-meson.c

index 53d449076dee32bb64cf3f0093b4a7e9016b9fa7..ea87d739f534bdf9ede84639486cf3e41195ae7b 100644 (file)
@@ -191,7 +191,8 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
                case PIN_CONFIG_BIAS_DISABLE:
                        dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
 
-                       meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
+                       meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg,
+                                              &bit);
                        ret = regmap_update_bits(pc->reg_pullen, reg,
                                                 BIT(bit), 0);
                        if (ret)