Backmerge remote-tracking branch 'drm/drm-next' into drm-misc-next
authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Mon, 29 Jun 2020 10:15:51 +0000 (12:15 +0200)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Mon, 29 Jun 2020 10:16:26 +0000 (12:16 +0200)
Some conflicts with ttm_bo->offset removal, but drm-misc-next needs updating to v5.8.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
24 files changed:
1  2 
drivers/dma-buf/dma-buf.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
drivers/gpu/drm/ast/ast_mode.c
drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
drivers/gpu/drm/drm_connector.c
drivers/gpu/drm/drm_edid.c
drivers/gpu/drm/meson/meson_dw_hdmi.c
drivers/gpu/drm/nouveau/dispnv04/crtc.c
drivers/gpu/drm/nouveau/dispnv04/disp.c
drivers/gpu/drm/nouveau/dispnv04/overlay.c
drivers/gpu/drm/nouveau/dispnv50/base507c.c
drivers/gpu/drm/nouveau/dispnv50/core507d.c
drivers/gpu/drm/nouveau/dispnv50/wndw.c
drivers/gpu/drm/nouveau/nouveau_dmem.c
drivers/gpu/drm/nouveau/nouveau_fbcon.c
drivers/gpu/drm/nouveau/nouveau_gem.c
drivers/gpu/drm/scheduler/sched_main.c
include/drm/drm_dp_helper.h
include/drm/ttm/ttm_bo_api.h
include/uapi/drm/drm_fourcc.h

Simple merge
index 2a7a6f62d627e17c011b48ec8d327da6ac777523,8d9c6feba660b58c9fd6fd6aa37a8b69831364fd..e06412f5066e0816522d1ba79204145bfb3ed2cf
@@@ -141,8 -144,8 +144,8 @@@ static void amdgpu_vm_sdma_copy_ptes(st
  
        src += p->num_dw_left * 4;
  
-       pe += amdgpu_bo_gpu_offset_no_check(bo);
-       trace_amdgpu_vm_copy_ptes(pe, src, count, p->direct);
 -      pe += amdgpu_gmc_sign_extend(bo->tbo.offset);
++      pe += amdgpu_gmc_sign_extend(amdgpu_bo_gpu_offset_no_check(bo));
+       trace_amdgpu_vm_copy_ptes(pe, src, count, p->immediate);
  
        amdgpu_vm_copy_pte(p->adev, ib, pe, src, count);
  }
@@@ -168,8 -171,8 +171,8 @@@ static void amdgpu_vm_sdma_set_ptes(str
  {
        struct amdgpu_ib *ib = p->job->ibs;
  
-       pe += amdgpu_bo_gpu_offset_no_check(bo);
-       trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->direct);
 -      pe += amdgpu_gmc_sign_extend(bo->tbo.offset);
++      pe += amdgpu_gmc_sign_extend(amdgpu_bo_gpu_offset_no_check(bo));
+       trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->immediate);
        if (count < 3) {
                amdgpu_vm_write_pte(p->adev, ib, pe, addr | flags,
                                    count, incr);
Simple merge
Simple merge
Simple merge
Simple merge
index cc6ab3c2eec703f7262028f994fc59665cfd94e2,640738f3196ce8fe931c72fa2ef6633e22adf691..086f7cf4c23e450cfa4bd7e84bd4fb3ca181e17e
@@@ -839,13 -840,12 +840,12 @@@ nv04_crtc_do_mode_set_base(struct drm_c
         */
        if (atomic) {
                drm_fb = passed_fb;
-               fb = nouveau_framebuffer(passed_fb);
        } else {
                drm_fb = crtc->primary->fb;
-               fb = nouveau_framebuffer(crtc->primary->fb);
        }
  
-       nv_crtc->fb.offset = fb->nvbo->offset;
+       nvbo = nouveau_gem_object(drm_fb->obj[0]);
 -      nv_crtc->fb.offset = nvbo->bo.offset;
++      nv_crtc->fb.offset = nvbo->offset;
  
        if (nv_crtc->lut.depth != drm_fb->format->depth) {
                nv_crtc->lut.depth = drm_fb->format->depth;
index 9529bd9053e7a1cca3e808168665eddd5404e7d8,6248fd1dbc6ddd1b3686a3f6f4aabbe5f2668f40..193ba9498f3d315fb20d3d5df697e93045f0d714
@@@ -150,7 -152,7 +152,7 @@@ nv10_update_plane(struct drm_plane *pla
        nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0);
  
        nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0);
-       nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->offset);
 -      nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nvbo->bo.offset);
++      nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nvbo->offset);
        nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w);
        nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y << 16 | src_x);
        nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w);
        if (format & NV_PVIDEO_FORMAT_PLANAR) {
                nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0);
                nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip),
-                       nv_fb->nvbo->offset + fb->offsets[1]);
 -                      nvbo->bo.offset + fb->offsets[1]);
++                      nvbo->offset + fb->offsets[1]);
        }
        nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format | fb->pitches[0]);
        nvif_wr32(dev, NV_PVIDEO_STOP, 0);
@@@ -396,7 -399,7 +399,7 @@@ nv04_update_plane(struct drm_plane *pla
  
        for (i = 0; i < 2; i++) {
                nvif_wr32(dev, NV_PVIDEO_BUFF0_START_ADDRESS + 4 * i,
-                         nv_fb->nvbo->offset);
 -                        nvbo->bo.offset);
++                        nvbo->offset);
                nvif_wr32(dev, NV_PVIDEO_BUFF0_PITCH_LENGTH + 4 * i,
                          fb->pitches[0]);
                nvif_wr32(dev, NV_PVIDEO_BUFF0_OFFSET + 4 * i, 0);
index b60aa987d7b499503d4228f4f00cdbfa72598810,511258bfbcbc4dbc7e593271afc5111abcdc56f3..ba20a77229001baa0964d0ec15eb5852e6bd6a11
@@@ -273,9 -274,9 +274,9 @@@ base507c_new_(const struct nv50_wndw_fu
        if (*pwndw = wndw, ret)
                return ret;
  
-       ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
+       ret = nv50_dmac_create(&drm->client.device, &disp->disp.object,
                               &oclass, head, &args, sizeof(args),
-                              disp->sync->offset, &wndw->wndw);
 -                             disp50->sync->bo.offset, &wndw->wndw);
++                             disp50->sync->offset, &wndw->wndw);
        if (ret) {
                NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret);
                return ret;
index ee0fd817185e2ebb2d014aa9fee009b5d84996fe,99b9b681736da283af1c60920f1e753aed543e69..720fe75de1859b2fc7cc901bb5af7fee3d6fbabe
@@@ -507,11 -521,12 +521,12 @@@ nv50_wndw_prepare_fb(struct drm_plane *
                        return PTR_ERR(ctxdma);
                }
  
-               asyw->image.handle[0] = ctxdma->object.handle;
+               if (asyw->visible)
+                       asyw->image.handle[0] = ctxdma->object.handle;
        }
  
-       asyw->state.fence = dma_resv_get_excl_rcu(fb->nvbo->bo.base.resv);
-       asyw->image.offset[0] = fb->nvbo->offset;
+       asyw->state.fence = dma_resv_get_excl_rcu(nvbo->bo.base.resv);
 -      asyw->image.offset[0] = nvbo->bo.offset;
++      asyw->image.offset[0] = nvbo->offset;
  
        if (wndw->func->prepare) {
                asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
index f13086a32f0f344e623df64a854a46e2d8773032,e5c230d9ae24ed2ccca95c4d25c6765ef26beca0..af870671195a83264bff21ca07261ac7f0f14c9b
@@@ -72,25 -75,32 +75,32 @@@ struct nouveau_dmem_migrate 
  
  struct nouveau_dmem {
        struct nouveau_drm *drm;
-       struct dev_pagemap pagemap;
        struct nouveau_dmem_migrate migrate;
-       struct list_head chunk_free;
-       struct list_head chunk_full;
-       struct list_head chunk_empty;
+       struct list_head chunks;
        struct mutex mutex;
+       struct page *free_pages;
+       spinlock_t lock;
  };
  
- static inline struct nouveau_dmem *page_to_dmem(struct page *page)
+ static struct nouveau_dmem_chunk *nouveau_page_to_chunk(struct page *page)
  {
-       return container_of(page->pgmap, struct nouveau_dmem, pagemap);
+       return container_of(page->pgmap, struct nouveau_dmem_chunk, pagemap);
+ }
+ static struct nouveau_drm *page_to_drm(struct page *page)
+ {
+       struct nouveau_dmem_chunk *chunk = nouveau_page_to_chunk(page);
+       return chunk->drm;
  }
  
static unsigned long nouveau_dmem_page_addr(struct page *page)
+ unsigned long nouveau_dmem_page_addr(struct page *page)
  {
-       struct nouveau_dmem_chunk *chunk = page->zone_device_data;
-       unsigned long idx = page_to_pfn(page) - chunk->pfn_first;
+       struct nouveau_dmem_chunk *chunk = nouveau_page_to_chunk(page);
+       unsigned long off = (page_to_pfn(page) << PAGE_SHIFT) -
+                               chunk->pagemap.res.start;
  
-       return (idx << PAGE_SHIFT) + chunk->bo->offset;
 -      return chunk->bo->bo.offset + off;
++      return chunk->bo->offset + off;
  }
  
  static void nouveau_dmem_page_free(struct page *page)
index 1341c6fca3ed6d8bda2a025e4abf5925d27a8e42,3d11b84d4cf9f8a1e333a1f90efd44d98543525e..f9f5a13fdb80200206195898813dada7bc402b32
@@@ -393,7 -393,7 +393,7 @@@ nouveau_fbcon_create(struct drm_fb_help
  
        /* To allow resizeing without swapping buffers */
        NV_INFO(drm, "allocated %dx%d fb: 0x%llx, bo %p\n",
-               fb->base.width, fb->base.height, fb->nvbo->offset, nvbo);
 -              fb->width, fb->height, nvbo->bo.offset, nvbo);
++              fb->width, fb->height, nvbo->offset, nvbo);
  
        vga_switcheroo_client_fb_set(dev->pdev, info);
        return 0;
Simple merge
Simple merge
Simple merge
Simple merge